Lines Matching refs:r11
138 mtspr SPRN_SPRG_SCRATCH1,r11
141 mfspr r11,SPRN_SRR1; /* check whether user or kernel */ \
142 andi. r11,r11,MSR_PR; \
143 tophys(r11,r1); /* use tophys(r1) if kernel */ \
145 mfspr r11,SPRN_SPRG_THREAD; \
146 lwz r11,THREAD_INFO-THREAD(r11); \
147 addi r11,r11,THREAD_SIZE; \
148 tophys(r11,r11); \
149 1: subi r11,r11,INT_FRAME_SIZE /* alloc exc. frame */
153 CLR_TOP32(r11); \
154 stw r10,_CCR(r11); /* save registers */ \
155 stw r12,GPR12(r11); \
156 stw r9,GPR9(r11); \
158 stw r10,GPR10(r11); \
160 stw r12,GPR11(r11); \
162 stw r10,_LINK(r11); \
165 stw r1,GPR1(r11); \
166 stw r1,0(r11); \
167 tovirt(r1,r11); /* set new kernel sp */ \
170 stw r0,GPR0(r11); \
171 SAVE_4GPRS(3, r11); \
172 SAVE_2GPRS(7, r11)
179 mfspr r11,SPRN_SPRG_SCRATCH1
201 stw r10,_TRAP(r11); \
236 stw r4,_DAR(r11)
240 stw r5,_DSISR(r11)
264 stw r4,_DAR(r11)
268 stw r5,_DSISR(r11)
335 mfspr r11, SPRN_SRR0 /* Get effective address of fault */
336 INVALIDATE_ADJACENT_PAGES_CPU15(r10, r11)
338 IS_KERNEL(r11, r11)
339 mfspr r11, SPRN_M_TW /* Get level 1 table */
341 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha
347 INVALIDATE_ADJACENT_PAGES_CPU15(r11, r10)
348 mfspr r11, SPRN_M_TW /* Get level 1 table base address */
351 rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
352 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */
356 rlwimi r10, r11, 0, 0, 32 - PAGE_SHIFT - 1 /* Add level 2 base */
360 rlwimi r11, r10, 0, 25, 26
362 MTSPR_CPU6(SPRN_MI_TWC, r11, r3) /* Set segment attributes */
365 rlwinm r11, r10, 32-5, _PAGE_PRESENT
366 and r11, r11, r10
367 rlwimi r10, r11, 0, _PAGE_PRESENT
369 li r11, RPN_PATTERN
376 rlwimi r10, r11, 0, 0x0ff8 /* Set 24-27, clear 20-23,28 */
397 mfspr r11, SPRN_MD_EPN
398 IS_KERNEL(r11, r11)
399 mfspr r11, SPRN_M_TW /* Get level 1 table */
401 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha
407 rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
408 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */
414 rlwimi r10, r11, 0, 0, 32 - PAGE_SHIFT - 1 /* Add level 2 base */
423 rlwimi r11, r10, 0, 26, 27
427 rlwimi r11, r10, 32-5, 30, 30
428 MTSPR_CPU6(SPRN_MD_TWC, r11, r3)
440 rlwinm r11, r10, 32-5, _PAGE_PRESENT
441 and r11, r11, r10
442 rlwimi r10, r11, 0, _PAGE_PRESENT
450 li r11, RPN_PATTERN
451 rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */
452 rlwimi r10, r11, 0, 20, 20 /* clear 20 */
459 mtspr SPRN_DAR, r11 /* Tag DAR */
487 mfspr r11, SPRN_DAR
488 cmpwi cr0, r11, RPN_PATTERN
494 stw r5,_DSISR(r11)
533 IS_KERNEL(r11, r10)
534 mfspr r11, SPRN_M_TW /* Get level 1 table */
536 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha
538 3: rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
539 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11) /* Get the level 1 entry */
540 rlwinm r11, r11,0,0,19 /* Extract page descriptor page address */
542 rlwimi r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
543 lwz r11, 0(r11) /* Get the pte */
545 rlwimi r11, r10, 0, 32 - PAGE_SHIFT, 31
546 lwz r11,0(r11)
550 xoris r10, r11, 0x7c00 /* check if major OP code is 31 */
570 andis. r10,r11,0x1f /* test if reg RA is r0 */
573 rlwinm r11,r11,0,0,20 /* Zero lower 10 bits */
574 oris r11,r11,640 /* Transform instr. to a "add r10,RA,RB" */
575 ori r11,r11,532
576 stw r11,0(r10) /* store add/and instruction */
579 mfspr r11, SPRN_SPRG_SCRATCH1 /* restore r11 */
592 rlwinm r10, r11, 24, 24, 28 /* offset into jump table for reg RB */
608 mtctr r11 ;b 154f /* r10 needs special handling */
609 mtctr r11 ;b 153f /* r11 needs special handling */
631 rlwinm. r11,r11,19,24,28 /* offset into jump table for reg RA */
633 addi r11, r11, 150b@l /* add start of table */
634 mtctr r11 /* load ctr with jump address */
635 rlwinm r11,r11,0,16,10 /* make sure we don't execute this more than once */
638 mfdar r11
639 mtctr r11 /* restore ctr reg from DAR */
645 153: mfspr r11, SPRN_SPRG_SCRATCH1 /* load r11 from SPRN_SPRG_SCRATCH1 */
646 add r10, r10, r11 /* add it */
647 mfctr r11 /* restore r11 */
649 154: mfspr r11, SPRN_SPRG_SCRATCH0 /* load r10 from SPRN_SPRG_SCRATCH0 */
650 add r10, r10, r11 /* add it */
651 mfctr r11 /* restore r11 */
822 li r11, MI_BOOTINIT /* Create RPN for address 0 */
823 addis r11, r11, 0x0080 /* Add 8M */
824 mtspr SPRN_MD_RPN, r11
832 addis r11, r11, 0x0080 /* Add 8M */
833 mtspr SPRN_MD_RPN, r11