267 	struct eeh_pe *pe = data;  in eeh_dump_pe_log()  local
275 	if (pe->state & EEH_PE_CFG_BLOCKED)  in eeh_dump_pe_log()
278 	eeh_pe_for_each_dev(pe, edev, tmp)  in eeh_dump_pe_log()
295 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)  in eeh_slot_error_detail()  argument
308 	if (!(pe->type & EEH_PE_PHB)) {  in eeh_slot_error_detail()
310 			eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);  in eeh_slot_error_detail()
324 		eeh_ops->configure_bridge(pe);  in eeh_slot_error_detail()
325 		if (!(pe->state & EEH_PE_CFG_BLOCKED)) {  in eeh_slot_error_detail()
326 			eeh_pe_restore_bars(pe);  in eeh_slot_error_detail()
329 			eeh_pe_traverse(pe, eeh_dump_pe_log, &loglen);  in eeh_slot_error_detail()
333 	eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);  in eeh_slot_error_detail()
369 static int eeh_phb_check_failure(struct eeh_pe *pe)  in eeh_phb_check_failure()  argument
379 	phb_pe = eeh_phb_pe_get(pe->phb);  in eeh_phb_check_failure()
382 			__func__, pe->phb->global_number);  in eeh_phb_check_failure()
439 	struct eeh_pe *pe, *parent_pe, *phb_pe;  in eeh_dev_check_failure()  local
453 	pe = eeh_dev_to_pe(edev);  in eeh_dev_check_failure()
456 	if (!pe) {  in eeh_dev_check_failure()
463 	if (!pe->addr && !pe->config_addr) {  in eeh_dev_check_failure()
472 	ret = eeh_phb_check_failure(pe);  in eeh_dev_check_failure()
481 	if (eeh_pe_passed(pe))  in eeh_dev_check_failure()
492 	if (pe->state & EEH_PE_ISOLATED) {  in eeh_dev_check_failure()
493 		pe->check_count++;  in eeh_dev_check_failure()
494 		if (pe->check_count % EEH_MAX_FAILS == 0) {  in eeh_dev_check_failure()
500 				pe->check_count,  in eeh_dev_check_failure()
517 	ret = eeh_ops->get_state(pe, NULL);  in eeh_dev_check_failure()
529 		pe->false_positives++;  in eeh_dev_check_failure()
539 	parent_pe = pe->parent;  in eeh_dev_check_failure()
549 			pe = parent_pe;  in eeh_dev_check_failure()
561 	eeh_pe_state_mark(pe, EEH_PE_ISOLATED);  in eeh_dev_check_failure()
568 	phb_pe = eeh_phb_pe_get(pe->phb);  in eeh_dev_check_failure()
570 	       pe->phb->global_number, pe->addr);  in eeh_dev_check_failure()
572 	       eeh_pe_loc_get(pe), eeh_pe_loc_get(phb_pe));  in eeh_dev_check_failure()
575 	eeh_send_failure_event(pe);  in eeh_dev_check_failure()
623 int eeh_pci_enable(struct eeh_pe *pe, int function)  in eeh_pci_enable()  argument
655 		rc = eeh_ops->get_state(pe, NULL);  in eeh_pci_enable()
670 	rc = eeh_ops->set_option(pe, function);  in eeh_pci_enable()
674 			__func__, function, pe->phb->global_number,  in eeh_pci_enable()
675 			pe->addr, rc);  in eeh_pci_enable()
679 		rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);  in eeh_pci_enable()
752 	struct eeh_pe *pe = eeh_dev_to_pe(edev);  in pcibios_set_pcie_reset_state()  local
754 	if (!pe) {  in pcibios_set_pcie_reset_state()
762 		eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);  in pcibios_set_pcie_reset_state()
763 		eeh_unfreeze_pe(pe, false);  in pcibios_set_pcie_reset_state()
764 		eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);  in pcibios_set_pcie_reset_state()
765 		eeh_pe_dev_traverse(pe, eeh_restore_dev_state, dev);  in pcibios_set_pcie_reset_state()
766 		eeh_pe_state_clear(pe, EEH_PE_ISOLATED);  in pcibios_set_pcie_reset_state()
769 		eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED);  in pcibios_set_pcie_reset_state()
770 		eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);  in pcibios_set_pcie_reset_state()
771 		eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);  in pcibios_set_pcie_reset_state()
772 		eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);  in pcibios_set_pcie_reset_state()
773 		eeh_ops->reset(pe, EEH_RESET_HOT);  in pcibios_set_pcie_reset_state()
776 		eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED);  in pcibios_set_pcie_reset_state()
777 		eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);  in pcibios_set_pcie_reset_state()
778 		eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);  in pcibios_set_pcie_reset_state()
779 		eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);  in pcibios_set_pcie_reset_state()
780 		eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);  in pcibios_set_pcie_reset_state()
783 		eeh_pe_state_clear(pe, EEH_PE_ISOLATED | EEH_PE_CFG_BLOCKED);  in pcibios_set_pcie_reset_state()
819 static void eeh_reset_pe_once(struct eeh_pe *pe)  in eeh_reset_pe_once()  argument
829 	eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);  in eeh_reset_pe_once()
832 		eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);  in eeh_reset_pe_once()
834 		eeh_ops->reset(pe, EEH_RESET_HOT);  in eeh_reset_pe_once()
836 	eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);  in eeh_reset_pe_once()
847 int eeh_reset_pe(struct eeh_pe *pe)  in eeh_reset_pe()  argument
853 	eeh_pe_state_mark(pe, EEH_PE_RESET | EEH_PE_CFG_BLOCKED);  in eeh_reset_pe()
857 		eeh_reset_pe_once(pe);  in eeh_reset_pe()
863 		state = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);  in eeh_reset_pe()
871 				__func__, pe->phb->global_number, pe->addr);  in eeh_reset_pe()
879 			__func__, state, pe->phb->global_number, pe->addr, (i + 1));  in eeh_reset_pe()
883 	eeh_pe_state_clear(pe, EEH_PE_RESET | EEH_PE_CFG_BLOCKED);  in eeh_reset_pe()
1234 	if (!edev || !edev->pdev || !edev->pe) {  in eeh_remove_device()
1247 	if (!(edev->pe->state & EEH_PE_KEEP))  in eeh_remove_device()
1265 int eeh_unfreeze_pe(struct eeh_pe *pe, bool sw_state)  in eeh_unfreeze_pe()  argument
1269 	ret = eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);  in eeh_unfreeze_pe()
1272 			__func__, ret, pe->phb->global_number, pe->addr);  in eeh_unfreeze_pe()
1276 	ret = eeh_pci_enable(pe, EEH_OPT_THAW_DMA);  in eeh_unfreeze_pe()
1279 			__func__, ret, pe->phb->global_number, pe->addr);  in eeh_unfreeze_pe()
1284 	if (sw_state && (pe->state & EEH_PE_ISOLATED))  in eeh_unfreeze_pe()
1285 		eeh_pe_state_clear(pe, EEH_PE_ISOLATED);  in eeh_unfreeze_pe()
1298 static int eeh_pe_change_owner(struct eeh_pe *pe)  in eeh_pe_change_owner()  argument
1307 	ret = eeh_ops->get_state(pe, NULL);  in eeh_pe_change_owner()
1316 	eeh_pe_for_each_dev(pe, edev, tmp) {  in eeh_pe_change_owner()
1339 	return eeh_unfreeze_pe(pe, true);  in eeh_pe_change_owner()
1342 	return eeh_pe_reset_and_recover(pe);  in eeh_pe_change_owner()
1367 	if (!edev || !edev->pe)  in eeh_dev_open()
1376 	ret = eeh_pe_change_owner(edev->pe);  in eeh_dev_open()
1381 	atomic_inc(&edev->pe->pass_dev_cnt);  in eeh_dev_open()
1411 	if (!edev || !edev->pe || !eeh_pe_passed(edev->pe))  in eeh_dev_release()
1415 	WARN_ON(atomic_dec_if_positive(&edev->pe->pass_dev_cnt) < 0);  in eeh_dev_release()
1416 	eeh_pe_change_owner(edev->pe);  in eeh_dev_release()
1462 	if (!edev || !edev->pe)  in eeh_iommu_group_to_pe()
1465 	return edev->pe;  in eeh_iommu_group_to_pe()
1479 int eeh_pe_set_option(struct eeh_pe *pe, int option)  in eeh_pe_set_option()  argument
1484 	if (!pe)  in eeh_pe_set_option()
1495 			ret = eeh_pe_change_owner(pe);  in eeh_pe_set_option()
1509 		ret = eeh_pci_enable(pe, option);  in eeh_pe_set_option()
1528 int eeh_pe_get_state(struct eeh_pe *pe)  in eeh_pe_get_state()  argument
1534 	if (!pe)  in eeh_pe_get_state()
1540 	result = eeh_ops->get_state(pe, NULL);  in eeh_pe_get_state()
1560 static int eeh_pe_reenable_devices(struct eeh_pe *pe)  in eeh_pe_reenable_devices()  argument
1567 	eeh_pe_restore_bars(pe);  in eeh_pe_reenable_devices()
1573 	eeh_pe_for_each_dev(pe, edev, tmp) {  in eeh_pe_reenable_devices()
1587 	return eeh_unfreeze_pe(pe, true);  in eeh_pe_reenable_devices()
1599 int eeh_pe_reset(struct eeh_pe *pe, int option)  in eeh_pe_reset()  argument
1604 	if (!pe)  in eeh_pe_reset()
1612 		ret = eeh_ops->reset(pe, option);  in eeh_pe_reset()
1613 		eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);  in eeh_pe_reset()
1617 		ret = eeh_pe_reenable_devices(pe);  in eeh_pe_reset()
1626 		eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);  in eeh_pe_reset()
1628 		eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);  in eeh_pe_reset()
1629 		ret = eeh_ops->reset(pe, option);  in eeh_pe_reset()
1649 int eeh_pe_configure(struct eeh_pe *pe)  in eeh_pe_configure()  argument
1654 	if (!pe)  in eeh_pe_configure()
1673 int eeh_pe_inject_err(struct eeh_pe *pe, int type, int func,  in eeh_pe_inject_err()  argument
1677 	if (!pe)  in eeh_pe_inject_err()
1692 	return eeh_ops->err_inject(pe, type, func, addr, mask);  in eeh_pe_inject_err()