Lines Matching refs:x0
59 cpu-release-addr = <0x0 0x01f00000>;
65 reg = <0x0 0x0 0x0 0x0>; // filled in by zImage
87 reg = <0x310 0x000e0000 0x0 0xf0>;
124 reg = <0x300 0x00010000 0x0 0x10000>;
131 reg = <0x300 0x10000000 0x0 0x10000>;
138 reg = <0x300 0x00000000 0x0 0x10000>;
145 reg = <0x300 0x10010000 0x0 0x10000>;
152 reg = <0x300 0x10020000 0x0 0x10000>;
178 interrupts = <0x0 0x1>;
182 interrupt-map = </*Status*/ 0x0 &MPIC 81 0x4
221 reg = <0x0 0x00000020>;
258 port = <0x0>; /* port number */
259 reg = <0x00000101 0x00000000 0x0 0x10000000 /* Config space access */
260 0x00000100 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
264 ranges = <0x02000000 0x00000000 0x80000000 0x00000110 0x80000000 0x0 0x80000000
265 0x01000000 0x0 0x0 0x00000140 0x0 0x0 0x00010000>;
267 /* Inbound starting at 0x0 to 0x40000000000. In order to use MSI
270 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x400 0x0>;
273 bus-range = <0x0 0xf>;
283 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
285 0x0 0x0 0x0 0x1 &MPIC 45 0x2 /* int A */
286 0x0 0x0 0x0 0x2 &MPIC 46 0x2 /* int B */
287 0x0 0x0 0x0 0x3 &MPIC 47 0x2 /* int C */
288 0x0 0x0 0x0 0x4 &MPIC 48 0x2 /* int D */>;
299 reg = <0x00000201 0x00000000 0x0 0x10000000 /* Config space access */
300 0x00000200 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
304 ranges = <0x02000000 0x00000000 0x80000000 0x00000210 0x80000000 0x0 0x80000000
305 0x01000000 0x0 0x0 0x00000240 0x0 0x0 0x00010000>;
307 /* Inbound starting at 0x0 to 0x40000000000. In order to use MSI
310 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x400 0x0>;
313 bus-range = <0x0 0xf>;
323 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
325 0x0 0x0 0x0 0x1 &MPIC 53 0x2 /* int A */
326 0x0 0x0 0x0 0x2 &MPIC 54 0x2 /* int B */
327 0x0 0x0 0x0 0x3 &MPIC 55 0x2 /* int C */
328 0x0 0x0 0x0 0x4 &MPIC 56 0x2 /* int D */>;
339 reg = <0x00000181 0x00000000 0x0 0x10000000 /* Config space access */
340 0x00000180 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
344 ranges = <0x02000000 0x00000000 0x80000000 0x00000190 0x80000000 0x0 0x80000000
345 0x01000000 0x0 0x0 0x000001c0 0x0 0x0 0x00010000>;
347 /* Inbound starting at 0x0 to 0x40000000000. In order to use MSI
350 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x400 0x0>;
353 bus-range = <0x0 0xf>;
363 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
365 0x0 0x0 0x0 0x1 &MPIC 61 0x2 /* int A */
366 0x0 0x0 0x0 0x2 &MPIC 62 0x2 /* int B */
367 0x0 0x0 0x0 0x3 &MPIC 63 0x2 /* int C */
368 0x0 0x0 0x0 0x4 &MPIC 64 0x2 /* int D */>;
379 reg = <0x00000281 0x00000000 0x0 0x10000000 /* Config space access */
380 0x00000280 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
384 ranges = <0x02000000 0x00000000 0x80000000 0x00000290 0x80000000 0x0 0x80000000
385 0x01000000 0x0 0x0 0x000002c0 0x0 0x0 0x00010000>;
387 /* Inbound starting at 0x0 to 0x40000000000. In order to use MSI
390 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x400 0x0>;
393 bus-range = <0x0 0xf>;
403 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
405 0x0 0x0 0x0 0x1 &MPIC 69 0x2 /* int A */
406 0x0 0x0 0x0 0x2 &MPIC 70 0x2 /* int B */
407 0x0 0x0 0x0 0x3 &MPIC 71 0x2 /* int C */
408 0x0 0x0 0x0 0x4 &MPIC 72 0x2 /* int D */>;