50 	u32 mask;	/* mask of valid bits in pending/mask registers */  member
62 		.mask	= 0x0000efff,
65 		.mask	= 0x00001fff,
68 		.mask	= 0x00000007,
71 		.mask	= 0x0003ffff,
74 		.mask	= 0xffffffff,
136 	unsigned int group, intr_bit, mask, irq_nr = d->irq;  in rb532_disable_irq()  local
148 		mask = READ_MASK(addr);  in rb532_disable_irq()
149 		mask |= intr_bit;  in rb532_disable_irq()
150 		WRITE_MASK(addr, mask);  in rb532_disable_irq()
160 		if (mask == intr_group[group].mask)  in rb532_disable_irq()