41 } reg;  variable
56 	reg.reset_counter1 = 0;  in loongson2_reg_setup()
57 	reg.reset_counter2 = 0;  in loongson2_reg_setup()
65 		reg.reset_counter1 = 0x80000000ULL - cfg[0].count;  in loongson2_reg_setup()
70 		reg.reset_counter2 = 0x80000000ULL - cfg[1].count;  in loongson2_reg_setup()
81 	reg.ctrl = ctrl;  in loongson2_reg_setup()
83 	reg.cnt1_enabled = cfg[0].enabled;  in loongson2_reg_setup()
84 	reg.cnt2_enabled = cfg[1].enabled;  in loongson2_reg_setup()
89 	write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1);  in loongson2_cpu_setup()
95 	if (reg.cnt1_enabled || reg.cnt2_enabled)  in loongson2_cpu_start()
96 		write_c0_perfctrl(reg.ctrl);  in loongson2_cpu_start()
103 	memset(&reg, 0, sizeof(reg));  in loongson2_cpu_stop()
116 	enabled = reg.cnt1_enabled | reg.cnt2_enabled;  in loongson2_perfcount_handler()
125 		if (reg.cnt1_enabled)  in loongson2_perfcount_handler()
127 		counter1 = reg.reset_counter1;  in loongson2_perfcount_handler()
130 		if (reg.cnt2_enabled)  in loongson2_perfcount_handler()
132 		counter2 = reg.reset_counter2;  in loongson2_perfcount_handler()