Lines Matching refs:rt
104 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs; in microMIPS32_to_MIPS32()
105 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt; in microMIPS32_to_MIPS32()
109 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs; in microMIPS32_to_MIPS32()
110 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt; in microMIPS32_to_MIPS32()
114 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs; in microMIPS32_to_MIPS32()
115 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt; in microMIPS32_to_MIPS32()
119 mips32_insn.mm_i_format.rt = insn.mm_i_format.rs; in microMIPS32_to_MIPS32()
120 mips32_insn.mm_i_format.rs = insn.mm_i_format.rt; in microMIPS32_to_MIPS32()
124 if ((insn.mm_i_format.rt == mm_bc1f_op) || in microMIPS32_to_MIPS32()
125 (insn.mm_i_format.rt == mm_bc1t_op)) { in microMIPS32_to_MIPS32()
129 (insn.mm_i_format.rt == mm_bc1t_op) ? 1 : 0; in microMIPS32_to_MIPS32()
183 mips32_insn.r_format.rt = in microMIPS32_to_MIPS32()
268 mips32_insn.r_format.rt = in microMIPS32_to_MIPS32()
270 mips32_insn.r_format.rd = insn.mm_fp4_format.rt; in microMIPS32_to_MIPS32()
292 insn.mm_fp3_format.rt; in microMIPS32_to_MIPS32()
316 insn.mm_fp3_format.rt; in microMIPS32_to_MIPS32()
356 insn.mm_fp1_format.rt; in microMIPS32_to_MIPS32()
375 insn.mm_fp1_format.rt; in microMIPS32_to_MIPS32()
398 mips32_insn.fp1_format.rt = in microMIPS32_to_MIPS32()
399 insn.mm_fp1_format.rt; in microMIPS32_to_MIPS32()
413 mips32_insn.fp0_format.ft = insn.mm_fp4_format.rt; in microMIPS32_to_MIPS32()
463 switch (insn.i_format.rt) { in isBranchInstr()
467 insn.i_format.rt == bltzall_op)) in isBranchInstr()
490 insn.i_format.rt == bgezall_op)) in isBranchInstr()
532 regs->regs[insn.i_format.rt]) in isBranchInstr()
546 regs->regs[insn.i_format.rt]) in isBranchInstr()
556 if (!insn.i_format.rt && NO_R6EMU) in isBranchInstr()
572 if (cpu_has_mips_r6 && insn.i_format.rt) { in isBranchInstr()
574 ((!insn.i_format.rs && insn.i_format.rt) || in isBranchInstr()
575 (insn.i_format.rs == insn.i_format.rt))) in isBranchInstr()
593 if (!insn.i_format.rt && NO_R6EMU) in isBranchInstr()
609 if (cpu_has_mips_r6 && insn.i_format.rt) { in isBranchInstr()
611 ((!insn.i_format.rs && insn.i_format.rt) || in isBranchInstr()
612 (insn.i_format.rs == insn.i_format.rt))) in isBranchInstr()
634 if (insn.i_format.rt && !insn.i_format.rs) in isBranchInstr()
642 if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) == 0) in isBranchInstr()
648 if ((regs->regs[insn.i_format.rs] & (1ull<<(insn.i_format.rt + 32))) == 0) in isBranchInstr()
654 if (regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) in isBranchInstr()
660 if (regs->regs[insn.i_format.rs] & (1ull<<(insn.i_format.rt + 32))) in isBranchInstr()
712 if (get_fpr32(¤t->thread.fpu.fpr[insn.i_format.rt], 0) & 0x1) in isBranchInstr()
716 if (!(get_fpr32(¤t->thread.fpu.fpr[insn.i_format.rt], 0) & 0x1)) in isBranchInstr()
742 bit = (insn.i_format.rt >> 2); in isBranchInstr()
745 switch (insn.i_format.rt & 3) { in isBranchInstr()