Lines Matching refs:c
76 static inline void cpu_set_fpu_fcsr_mask(struct cpuinfo_mips *c) in cpu_set_fpu_fcsr_mask() argument
80 fcsr = c->fpu_csr31; in cpu_set_fpu_fcsr_mask()
98 c->fpu_msk31 = ~(fcsr0 ^ fcsr1) & ~mask; in cpu_set_fpu_fcsr_mask()
104 static void cpu_set_nofpu_id(struct cpuinfo_mips *c) in cpu_set_nofpu_id() argument
109 if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 | in cpu_set_nofpu_id()
113 if (c->isa_level & (MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2 | in cpu_set_nofpu_id()
116 c->fpu_id = value; in cpu_set_nofpu_id()
125 static void cpu_set_fpu_opts(struct cpuinfo_mips *c) in cpu_set_fpu_opts() argument
127 c->fpu_id = cpu_get_fpu_id(); in cpu_set_fpu_opts()
128 mips_nofpu_msk31 = c->fpu_msk31; in cpu_set_fpu_opts()
130 if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 | in cpu_set_fpu_opts()
133 if (c->fpu_id & MIPS_FPIR_3D) in cpu_set_fpu_opts()
134 c->ases |= MIPS_ASE_MIPS3D; in cpu_set_fpu_opts()
135 if (c->fpu_id & MIPS_FPIR_FREP) in cpu_set_fpu_opts()
136 c->options |= MIPS_CPU_FRE; in cpu_set_fpu_opts()
139 cpu_set_fpu_fcsr_mask(c); in cpu_set_fpu_opts()
145 static void cpu_set_nofpu_opts(struct cpuinfo_mips *c) in cpu_set_nofpu_opts() argument
147 c->options &= ~MIPS_CPU_FPU; in cpu_set_nofpu_opts()
148 c->fpu_msk31 = mips_nofpu_msk31; in cpu_set_nofpu_opts()
150 cpu_set_nofpu_id(c); in cpu_set_nofpu_opts()
194 static int set_ftlb_enable(struct cpuinfo_mips *c, int enable);
253 struct cpuinfo_mips *c = ¤t_cpu_data; in check_errata() local
262 if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_34K_V1_0_2) in check_errata()
303 static inline void cpu_probe_vmbits(struct cpuinfo_mips *c) in cpu_probe_vmbits() argument
308 c->vmbits = fls64(read_c0_entryhi() & 0x3fffffffffffe000ULL); in cpu_probe_vmbits()
312 static void set_isa(struct cpuinfo_mips *c, unsigned int isa) in set_isa() argument
316 c->isa_level |= MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2; in set_isa()
318 c->isa_level |= MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1; in set_isa()
320 c->isa_level |= MIPS_CPU_ISA_V; in set_isa()
322 c->isa_level |= MIPS_CPU_ISA_IV; in set_isa()
324 c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III; in set_isa()
329 c->isa_level |= MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6; in set_isa()
331 c->isa_level |= MIPS_CPU_ISA_M32R6; in set_isa()
335 c->isa_level |= MIPS_CPU_ISA_M32R2; in set_isa()
337 c->isa_level |= MIPS_CPU_ISA_M32R1; in set_isa()
339 c->isa_level |= MIPS_CPU_ISA_II; in set_isa()
347 static unsigned int calculate_ftlb_probability(struct cpuinfo_mips *c) in calculate_ftlb_probability() argument
350 unsigned int probability = c->tlbsize / c->tlbsizevtlb; in calculate_ftlb_probability()
373 static int set_ftlb_enable(struct cpuinfo_mips *c, int enable) in set_ftlb_enable() argument
378 switch (c->cputype) { in set_ftlb_enable()
388 (calculate_ftlb_probability(c) in set_ftlb_enable()
400 write_c0_config7(config | (calculate_ftlb_probability(c) in set_ftlb_enable()
410 static inline unsigned int decode_config0(struct cpuinfo_mips *c) in decode_config0() argument
422 c->options |= MIPS_CPU_TLB; in decode_config0()
424 c->options |= MIPS_CPU_TLB | MIPS_CPU_FTLB; in decode_config0()
431 set_isa(c, MIPS_CPU_ISA_M32R1); in decode_config0()
434 set_isa(c, MIPS_CPU_ISA_M32R2); in decode_config0()
437 set_isa(c, MIPS_CPU_ISA_M32R6); in decode_config0()
446 set_isa(c, MIPS_CPU_ISA_M64R1); in decode_config0()
449 set_isa(c, MIPS_CPU_ISA_M64R2); in decode_config0()
452 set_isa(c, MIPS_CPU_ISA_M64R6); in decode_config0()
468 static inline unsigned int decode_config1(struct cpuinfo_mips *c) in decode_config1() argument
475 c->ases |= MIPS_ASE_MDMX; in decode_config1()
477 c->options |= MIPS_CPU_WATCH; in decode_config1()
479 c->ases |= MIPS_ASE_MIPS16; in decode_config1()
481 c->options |= MIPS_CPU_EJTAG; in decode_config1()
483 c->options |= MIPS_CPU_FPU; in decode_config1()
484 c->options |= MIPS_CPU_32FPR; in decode_config1()
487 c->tlbsize = ((config1 & MIPS_CONF1_TLBS) >> 25) + 1; in decode_config1()
488 c->tlbsizevtlb = c->tlbsize; in decode_config1()
489 c->tlbsizeftlbsets = 0; in decode_config1()
495 static inline unsigned int decode_config2(struct cpuinfo_mips *c) in decode_config2() argument
502 c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; in decode_config2()
507 static inline unsigned int decode_config3(struct cpuinfo_mips *c) in decode_config3() argument
514 c->ases |= MIPS_ASE_SMARTMIPS; in decode_config3()
515 c->options |= MIPS_CPU_RIXI; in decode_config3()
518 c->options |= MIPS_CPU_RIXI; in decode_config3()
520 c->ases |= MIPS_ASE_DSP; in decode_config3()
522 c->ases |= MIPS_ASE_DSP2P; in decode_config3()
524 c->options |= MIPS_CPU_VINT; in decode_config3()
526 c->options |= MIPS_CPU_VEIC; in decode_config3()
528 c->ases |= MIPS_ASE_MIPSMT; in decode_config3()
530 c->options |= MIPS_CPU_ULRI; in decode_config3()
532 c->options |= MIPS_CPU_MICROMIPS; in decode_config3()
534 c->ases |= MIPS_ASE_VZ; in decode_config3()
536 c->options |= MIPS_CPU_SEGMENTS; in decode_config3()
538 c->ases |= MIPS_ASE_MSA; in decode_config3()
540 c->htw_seq = 0; in decode_config3()
541 c->options |= MIPS_CPU_HTW; in decode_config3()
544 c->options |= MIPS_CPU_CDMM; in decode_config3()
546 c->options |= MIPS_CPU_SP; in decode_config3()
551 static inline unsigned int decode_config4(struct cpuinfo_mips *c) in decode_config4() argument
562 c->options |= MIPS_CPU_TLBINV; in decode_config4()
578 c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40; in decode_config4()
579 c->tlbsizevtlb = c->tlbsize; in decode_config4()
582 c->tlbsizevtlb += in decode_config4()
585 c->tlbsize = c->tlbsizevtlb; in decode_config4()
601 set_ftlb_enable(c, 0); in decode_config4()
604 c->tlbsizeftlbsets = 1 << in decode_config4()
607 c->tlbsizeftlbways = ((config4 & MIPS_CONF4_FTLBWAYS) >> in decode_config4()
609 c->tlbsize += c->tlbsizeftlbways * c->tlbsizeftlbsets; in decode_config4()
615 c->kscratch_mask = (config4 >> 16) & 0xff; in decode_config4()
620 static inline unsigned int decode_config5(struct cpuinfo_mips *c) in decode_config5() argument
629 c->options |= MIPS_CPU_EVA; in decode_config5()
631 c->options |= MIPS_CPU_MAAR; in decode_config5()
633 c->options |= MIPS_CPU_RW_LLB; in decode_config5()
636 c->options |= MIPS_CPU_XPA; in decode_config5()
642 static void decode_configs(struct cpuinfo_mips *c) in decode_configs() argument
647 c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER | in decode_configs()
650 c->scache.flags = MIPS_CACHE_NOT_PRESENT; in decode_configs()
653 set_ftlb_enable(c, !mips_ftlb_disabled); in decode_configs()
655 ok = decode_config0(c); /* Read Config registers. */ in decode_configs()
658 ok = decode_config1(c); in decode_configs()
660 ok = decode_config2(c); in decode_configs()
662 ok = decode_config3(c); in decode_configs()
664 ok = decode_config4(c); in decode_configs()
666 ok = decode_config5(c); in decode_configs()
668 mips_probe_watch_registers(c); in decode_configs()
676 c->options |= MIPS_CPU_RIXIEX; in decode_configs()
681 c->core = get_ebase_cpunum(); in decode_configs()
683 c->core >>= fls(core_nvpes()) - 1; in decode_configs()
691 static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_legacy() argument
693 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_legacy()
695 c->cputype = CPU_R2000; in cpu_probe_legacy()
697 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
698 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | in cpu_probe_legacy()
701 c->options |= MIPS_CPU_FPU; in cpu_probe_legacy()
702 c->tlbsize = 64; in cpu_probe_legacy()
705 if ((c->processor_id & PRID_REV_MASK) == PRID_REV_R3000A) { in cpu_probe_legacy()
707 c->cputype = CPU_R3081E; in cpu_probe_legacy()
710 c->cputype = CPU_R3000A; in cpu_probe_legacy()
714 c->cputype = CPU_R3000; in cpu_probe_legacy()
717 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
718 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | in cpu_probe_legacy()
721 c->options |= MIPS_CPU_FPU; in cpu_probe_legacy()
722 c->tlbsize = 64; in cpu_probe_legacy()
726 if ((c->processor_id & PRID_REV_MASK) >= in cpu_probe_legacy()
728 c->cputype = CPU_R4400PC; in cpu_probe_legacy()
731 c->cputype = CPU_R4000PC; in cpu_probe_legacy()
755 if ((c->processor_id & PRID_REV_MASK) >= in cpu_probe_legacy()
757 c->cputype = mc ? CPU_R4400MC : CPU_R4400SC; in cpu_probe_legacy()
760 c->cputype = mc ? CPU_R4000MC : CPU_R4000SC; in cpu_probe_legacy()
765 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
766 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
767 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
770 c->tlbsize = 48; in cpu_probe_legacy()
773 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
774 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
775 c->options = R4K_OPTS; in cpu_probe_legacy()
776 c->tlbsize = 32; in cpu_probe_legacy()
777 switch (c->processor_id & 0xf0) { in cpu_probe_legacy()
779 c->cputype = CPU_VR4111; in cpu_probe_legacy()
783 c->cputype = CPU_VR4121; in cpu_probe_legacy()
787 if ((c->processor_id & 0xf) < 0x3) { in cpu_probe_legacy()
788 c->cputype = CPU_VR4122; in cpu_probe_legacy()
791 c->cputype = CPU_VR4181A; in cpu_probe_legacy()
796 if ((c->processor_id & 0xf) < 0x4) { in cpu_probe_legacy()
797 c->cputype = CPU_VR4131; in cpu_probe_legacy()
800 c->cputype = CPU_VR4133; in cpu_probe_legacy()
801 c->options |= MIPS_CPU_LLSC; in cpu_probe_legacy()
807 c->cputype = CPU_VR41XX; in cpu_probe_legacy()
813 c->cputype = CPU_R4300; in cpu_probe_legacy()
815 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
816 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
817 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
819 c->tlbsize = 32; in cpu_probe_legacy()
822 c->cputype = CPU_R4600; in cpu_probe_legacy()
824 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
825 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
826 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
828 c->tlbsize = 48; in cpu_probe_legacy()
838 c->cputype = CPU_R4650; in cpu_probe_legacy()
840 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
841 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
842 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC; in cpu_probe_legacy()
843 c->tlbsize = 48; in cpu_probe_legacy()
847 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
848 c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE; in cpu_probe_legacy()
850 if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) { in cpu_probe_legacy()
851 c->cputype = CPU_TX3927; in cpu_probe_legacy()
853 c->tlbsize = 64; in cpu_probe_legacy()
855 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_legacy()
857 c->cputype = CPU_TX3912; in cpu_probe_legacy()
859 c->tlbsize = 32; in cpu_probe_legacy()
862 c->cputype = CPU_TX3922; in cpu_probe_legacy()
864 c->tlbsize = 64; in cpu_probe_legacy()
870 c->cputype = CPU_R4700; in cpu_probe_legacy()
872 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
873 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
874 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
876 c->tlbsize = 48; in cpu_probe_legacy()
879 c->cputype = CPU_TX49XX; in cpu_probe_legacy()
881 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
882 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
883 c->options = R4K_OPTS | MIPS_CPU_LLSC; in cpu_probe_legacy()
884 if (!(c->processor_id & 0x08)) in cpu_probe_legacy()
885 c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR; in cpu_probe_legacy()
886 c->tlbsize = 48; in cpu_probe_legacy()
889 c->cputype = CPU_R5000; in cpu_probe_legacy()
891 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
892 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
894 c->tlbsize = 48; in cpu_probe_legacy()
897 c->cputype = CPU_R5432; in cpu_probe_legacy()
899 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
900 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
902 c->tlbsize = 48; in cpu_probe_legacy()
905 c->cputype = CPU_R5500; in cpu_probe_legacy()
907 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
908 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
910 c->tlbsize = 48; in cpu_probe_legacy()
913 c->cputype = CPU_NEVADA; in cpu_probe_legacy()
915 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
916 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
918 c->tlbsize = 48; in cpu_probe_legacy()
921 c->cputype = CPU_R6000; in cpu_probe_legacy()
923 set_isa(c, MIPS_CPU_ISA_II); in cpu_probe_legacy()
924 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
925 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU | in cpu_probe_legacy()
927 c->tlbsize = 32; in cpu_probe_legacy()
930 c->cputype = CPU_R6000A; in cpu_probe_legacy()
932 set_isa(c, MIPS_CPU_ISA_II); in cpu_probe_legacy()
933 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
934 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU | in cpu_probe_legacy()
936 c->tlbsize = 32; in cpu_probe_legacy()
939 c->cputype = CPU_RM7000; in cpu_probe_legacy()
941 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
942 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
952 c->tlbsize = (read_c0_info() & (1 << 29)) ? 64 : 48; in cpu_probe_legacy()
955 c->cputype = CPU_R8000; in cpu_probe_legacy()
957 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
958 c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX | in cpu_probe_legacy()
961 c->tlbsize = 384; /* has weird TLB: 3-way x 128 */ in cpu_probe_legacy()
964 c->cputype = CPU_R10000; in cpu_probe_legacy()
966 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
967 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | in cpu_probe_legacy()
971 c->tlbsize = 64; in cpu_probe_legacy()
974 c->cputype = CPU_R12000; in cpu_probe_legacy()
976 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
977 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | in cpu_probe_legacy()
981 c->tlbsize = 64; in cpu_probe_legacy()
984 if (((c->processor_id >> 4) & 0x0f) > 2) { in cpu_probe_legacy()
985 c->cputype = CPU_R16000; in cpu_probe_legacy()
988 c->cputype = CPU_R14000; in cpu_probe_legacy()
991 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
992 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | in cpu_probe_legacy()
996 c->tlbsize = 64; in cpu_probe_legacy()
999 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_legacy()
1001 c->cputype = CPU_LOONGSON2; in cpu_probe_legacy()
1004 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
1005 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
1008 c->cputype = CPU_LOONGSON2; in cpu_probe_legacy()
1011 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
1012 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
1015 c->cputype = CPU_LOONGSON3; in cpu_probe_legacy()
1018 set_isa(c, MIPS_CPU_ISA_M64R1); in cpu_probe_legacy()
1022 c->cputype = CPU_LOONGSON3; in cpu_probe_legacy()
1025 set_isa(c, MIPS_CPU_ISA_M64R1); in cpu_probe_legacy()
1029 c->options = R4K_OPTS | in cpu_probe_legacy()
1032 c->tlbsize = 64; in cpu_probe_legacy()
1033 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_legacy()
1036 decode_configs(c); in cpu_probe_legacy()
1038 c->cputype = CPU_LOONGSON1; in cpu_probe_legacy()
1040 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_legacy()
1050 static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_mips() argument
1052 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_mips()
1053 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_mips()
1055 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1056 c->cputype = CPU_QEMU_GENERIC; in cpu_probe_mips()
1060 c->cputype = CPU_4KC; in cpu_probe_mips()
1061 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1066 c->cputype = CPU_4KEC; in cpu_probe_mips()
1067 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1072 c->cputype = CPU_4KSC; in cpu_probe_mips()
1073 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1077 c->cputype = CPU_5KC; in cpu_probe_mips()
1078 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1082 c->cputype = CPU_5KE; in cpu_probe_mips()
1083 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1087 c->cputype = CPU_20KC; in cpu_probe_mips()
1088 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1092 c->cputype = CPU_24K; in cpu_probe_mips()
1093 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1097 c->cputype = CPU_24K; in cpu_probe_mips()
1098 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1102 c->cputype = CPU_25KF; in cpu_probe_mips()
1103 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1107 c->cputype = CPU_34K; in cpu_probe_mips()
1108 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1112 c->cputype = CPU_74K; in cpu_probe_mips()
1113 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1117 c->cputype = CPU_M14KC; in cpu_probe_mips()
1118 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1122 c->cputype = CPU_M14KEC; in cpu_probe_mips()
1123 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1127 c->cputype = CPU_1004K; in cpu_probe_mips()
1128 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1132 c->cputype = CPU_1074K; in cpu_probe_mips()
1133 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1137 c->cputype = CPU_INTERAPTIV; in cpu_probe_mips()
1141 c->cputype = CPU_INTERAPTIV; in cpu_probe_mips()
1145 c->cputype = CPU_PROAPTIV; in cpu_probe_mips()
1149 c->cputype = CPU_PROAPTIV; in cpu_probe_mips()
1153 c->cputype = CPU_P5600; in cpu_probe_mips()
1157 c->cputype = CPU_I6400; in cpu_probe_mips()
1161 c->cputype = CPU_M5150; in cpu_probe_mips()
1166 decode_configs(c); in cpu_probe_mips()
1171 static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_alchemy() argument
1173 decode_configs(c); in cpu_probe_alchemy()
1174 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_alchemy()
1177 c->cputype = CPU_ALCHEMY; in cpu_probe_alchemy()
1178 switch ((c->processor_id >> 24) & 0xff) { in cpu_probe_alchemy()
1193 if ((c->processor_id & PRID_REV_MASK) == 2) in cpu_probe_alchemy()
1207 static inline void cpu_probe_sibyte(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_sibyte() argument
1209 decode_configs(c); in cpu_probe_sibyte()
1211 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_sibyte()
1212 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_sibyte()
1214 c->cputype = CPU_SB1; in cpu_probe_sibyte()
1217 if ((c->processor_id & PRID_REV_MASK) < 0x02) in cpu_probe_sibyte()
1218 c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR); in cpu_probe_sibyte()
1221 c->cputype = CPU_SB1A; in cpu_probe_sibyte()
1227 static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_sandcraft() argument
1229 decode_configs(c); in cpu_probe_sandcraft()
1230 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_sandcraft()
1232 c->cputype = CPU_SR71000; in cpu_probe_sandcraft()
1234 c->scache.ways = 8; in cpu_probe_sandcraft()
1235 c->tlbsize = 64; in cpu_probe_sandcraft()
1240 static inline void cpu_probe_nxp(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_nxp() argument
1242 decode_configs(c); in cpu_probe_nxp()
1243 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_nxp()
1245 c->cputype = CPU_PR4450; in cpu_probe_nxp()
1247 set_isa(c, MIPS_CPU_ISA_M32R1); in cpu_probe_nxp()
1252 static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_broadcom() argument
1254 decode_configs(c); in cpu_probe_broadcom()
1255 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_broadcom()
1258 c->cputype = CPU_BMIPS32; in cpu_probe_broadcom()
1265 c->cputype = CPU_BMIPS3300; in cpu_probe_broadcom()
1270 int rev = c->processor_id & PRID_REV_MASK; in cpu_probe_broadcom()
1274 c->cputype = CPU_BMIPS4380; in cpu_probe_broadcom()
1278 c->cputype = CPU_BMIPS4350; in cpu_probe_broadcom()
1286 c->cputype = CPU_BMIPS5000; in cpu_probe_broadcom()
1289 c->options |= MIPS_CPU_ULRI; in cpu_probe_broadcom()
1294 static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_cavium() argument
1296 decode_configs(c); in cpu_probe_cavium()
1297 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_cavium()
1301 c->cputype = CPU_CAVIUM_OCTEON; in cpu_probe_cavium()
1308 c->cputype = CPU_CAVIUM_OCTEON_PLUS; in cpu_probe_cavium()
1318 c->cputype = CPU_CAVIUM_OCTEON2; in cpu_probe_cavium()
1324 c->cputype = CPU_CAVIUM_OCTEON3; in cpu_probe_cavium()
1330 c->cputype = CPU_UNKNOWN; in cpu_probe_cavium()
1335 static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_ingenic() argument
1337 decode_configs(c); in cpu_probe_ingenic()
1339 c->options &= ~MIPS_CPU_COUNTER; in cpu_probe_ingenic()
1341 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_ingenic()
1343 c->cputype = CPU_JZRISC; in cpu_probe_ingenic()
1344 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_ingenic()
1353 static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu) in cpu_probe_netlogic() argument
1355 decode_configs(c); in cpu_probe_netlogic()
1357 if ((c->processor_id & PRID_IMP_MASK) == PRID_IMP_NETLOGIC_AU13XX) { in cpu_probe_netlogic()
1358 c->cputype = CPU_ALCHEMY; in cpu_probe_netlogic()
1364 c->options = (MIPS_CPU_TLB | in cpu_probe_netlogic()
1372 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_netlogic()
1376 c->cputype = CPU_XLP; in cpu_probe_netlogic()
1382 c->cputype = CPU_XLP; in cpu_probe_netlogic()
1394 c->cputype = CPU_XLR; in cpu_probe_netlogic()
1411 c->cputype = CPU_XLR; in cpu_probe_netlogic()
1417 c->processor_id); in cpu_probe_netlogic()
1418 c->cputype = CPU_XLR; in cpu_probe_netlogic()
1422 if (c->cputype == CPU_XLP) { in cpu_probe_netlogic()
1423 set_isa(c, MIPS_CPU_ISA_M64R2); in cpu_probe_netlogic()
1424 c->options |= (MIPS_CPU_FPU | MIPS_CPU_ULRI | MIPS_CPU_MCHECK); in cpu_probe_netlogic()
1426 c->tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1; in cpu_probe_netlogic()
1428 set_isa(c, MIPS_CPU_ISA_M64R1); in cpu_probe_netlogic()
1429 c->tlbsize = ((read_c0_config1() >> 25) & 0x3f) + 1; in cpu_probe_netlogic()
1431 c->kscratch_mask = 0xf; in cpu_probe_netlogic()
1445 struct cpuinfo_mips *c = ¤t_cpu_data; in cpu_probe() local
1448 c->processor_id = PRID_IMP_UNKNOWN; in cpu_probe()
1449 c->fpu_id = FPIR_IMP_NONE; in cpu_probe()
1450 c->cputype = CPU_UNKNOWN; in cpu_probe()
1451 c->writecombine = _CACHE_UNCACHED; in cpu_probe()
1453 c->fpu_csr31 = FPU_CSR_RN; in cpu_probe()
1454 c->fpu_msk31 = FPU_CSR_RSVD | FPU_CSR_ABS2008 | FPU_CSR_NAN2008; in cpu_probe()
1456 c->processor_id = read_c0_prid(); in cpu_probe()
1457 switch (c->processor_id & PRID_COMP_MASK) { in cpu_probe()
1459 cpu_probe_legacy(c, cpu); in cpu_probe()
1462 cpu_probe_mips(c, cpu); in cpu_probe()
1465 cpu_probe_alchemy(c, cpu); in cpu_probe()
1468 cpu_probe_sibyte(c, cpu); in cpu_probe()
1471 cpu_probe_broadcom(c, cpu); in cpu_probe()
1474 cpu_probe_sandcraft(c, cpu); in cpu_probe()
1477 cpu_probe_nxp(c, cpu); in cpu_probe()
1480 cpu_probe_cavium(c, cpu); in cpu_probe()
1485 cpu_probe_ingenic(c, cpu); in cpu_probe()
1488 cpu_probe_netlogic(c, cpu); in cpu_probe()
1493 BUG_ON(c->cputype == CPU_UNKNOWN); in cpu_probe()
1500 BUG_ON(current_cpu_type() != c->cputype); in cpu_probe()
1503 c->options &= ~MIPS_CPU_FPU; in cpu_probe()
1506 c->ases &= ~(MIPS_ASE_DSP | MIPS_ASE_DSP2P); in cpu_probe()
1509 c->options &= ~MIPS_CPU_HTW; in cpu_probe()
1514 if (c->options & MIPS_CPU_FPU) in cpu_probe()
1515 cpu_set_fpu_opts(c); in cpu_probe()
1517 cpu_set_nofpu_opts(c); in cpu_probe()
1524 c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1; in cpu_probe()
1526 c->options |= MIPS_CPU_PCI; in cpu_probe()
1529 c->srsets = 1; in cpu_probe()
1535 c->msa_id = cpu_get_msa_id(); in cpu_probe()
1536 WARN(c->msa_id & MSA_IR_WRPF, in cpu_probe()
1541 cpu_probe_vmbits(c); in cpu_probe()
1551 struct cpuinfo_mips *c = ¤t_cpu_data; in cpu_report() local
1554 smp_processor_id(), c->processor_id, cpu_name_string()); in cpu_report()
1555 if (c->options & MIPS_CPU_FPU) in cpu_report()
1556 printk(KERN_INFO "FPU revision is: %08x\n", c->fpu_id); in cpu_report()
1558 pr_info("MSA revision is: %08x\n", c->msa_id); in cpu_report()