Lines Matching refs:t1
111 li t1, 2
112 sllv t0, t1, t0
115 _EXT t1, v0, MIPS_CONF1_IS_SHF, MIPS_CONF1_IS_SZ
116 xori t2, t1, 0x7
119 addiu t1, t1, 1
120 sllv t1, t3, t1
124 mul t1, t1, t0
125 mul t1, t1, t2
128 PTR_ADD a1, a0, t1
138 li t1, 2
139 sllv t0, t1, t0
142 _EXT t1, v0, MIPS_CONF1_DS_SHF, MIPS_CONF1_DS_SZ
143 xori t2, t1, 0x7
146 addiu t1, t1, 1
147 sllv t1, t3, t1
151 mul t1, t1, t0
152 mul t1, t1, t2
155 PTR_ADDU a1, a0, t1
204 PTR_L t1, VPEBOOTCFG_PC(v0)
207 jr t1
267 PTR_LA t1, 1f
268 jr.hb t1
298 sll t1, ta1, VPECONF0_XTC_SHIFT
299 or t0, t0, t1
333 li t1, COREBOOTCFG_SIZE
334 mul t0, t0, t1
335 PTR_LA t1, mips_cps_core_bootcfg
336 PTR_L t1, 0(t1)
337 PTR_ADDU t0, t0, t1
345 mfc0 t1, CP0_MVPCONF0
346 srl t1, t1, MVPCONF0_PVPE_SHIFT
347 andi t1, t1, MVPCONF0_PVPE >> MVPCONF0_PVPE_SHIFT
348 addiu t1, t1, 1
351 clz t1, t1
353 subu t1, t2, t1
355 sll t1, t2, t1
356 addiu t1, t1, -1
360 and t9, t9, t1
364 li t1, VPEBOOTCFG_SIZE
365 mul v0, t9, t1
382 PTR_LA t1, 1f
383 jr.hb t1
385 1: mfc0 t1, CP0_MVPCONTROL
386 ori t1, t1, MVPCONTROL_VPC
387 mtc0 t1, CP0_MVPCONTROL
419 lw t1, VPEBOOTCFG_PC(t0)
420 mttc0 t1, CP0_TCRESTART
423 lw t1, VPEBOOTCFG_SP(t0)
424 mttgpr t1, sp
427 lw t1, VPEBOOTCFG_GP(t0)
428 mttgpr t1, gp
440 li t1, ~TCSTATUS_IXMT
441 and t0, t0, t1
460 mfc0 t1, CP0_MVPCONTROL
461 xori t1, t1, MVPCONTROL_VPC
462 mtc0 t1, CP0_MVPCONTROL
508 psstate t1
516 psstate t1