Lines Matching refs:uint64_t

49 	uint64_t u64;
52 uint64_t reserved_32_63:32;
53 uint64_t cnt:32;
55 uint64_t cnt:32;
56 uint64_t reserved_32_63:32;
66 uint64_t u64;
69 uint64_t reserved_3_63:61;
70 uint64_t stat2:1;
71 uint64_t stat1:1;
72 uint64_t stat0:1;
74 uint64_t stat0:1;
75 uint64_t stat1:1;
76 uint64_t stat2:1;
77 uint64_t reserved_3_63:61;
87 uint64_t u64;
90 uint64_t reserved_17_63:47;
91 uint64_t seetrn:1;
92 uint64_t reserved_12_15:4;
93 uint64_t clkdly:5;
94 uint64_t runbist:1;
95 uint64_t statdrv:1;
96 uint64_t statrcv:1;
97 uint64_t sndtrn:1;
98 uint64_t drptrn:1;
99 uint64_t rcvtrn:1;
100 uint64_t srxdlck:1;
102 uint64_t srxdlck:1;
103 uint64_t rcvtrn:1;
104 uint64_t drptrn:1;
105 uint64_t sndtrn:1;
106 uint64_t statrcv:1;
107 uint64_t statdrv:1;
108 uint64_t runbist:1;
109 uint64_t clkdly:5;
110 uint64_t reserved_12_15:4;
111 uint64_t seetrn:1;
112 uint64_t reserved_17_63:47;
122 uint64_t u64;
125 uint64_t reserved_11_63:53;
126 uint64_t stxcal:1;
127 uint64_t reserved_9_9:1;
128 uint64_t srxtrn:1;
129 uint64_t s4clk1:1;
130 uint64_t s4clk0:1;
131 uint64_t d4clk1:1;
132 uint64_t d4clk0:1;
133 uint64_t reserved_0_3:4;
135 uint64_t reserved_0_3:4;
136 uint64_t d4clk0:1;
137 uint64_t d4clk1:1;
138 uint64_t s4clk0:1;
139 uint64_t s4clk1:1;
140 uint64_t srxtrn:1;
141 uint64_t reserved_9_9:1;
142 uint64_t stxcal:1;
143 uint64_t reserved_11_63:53;
153 uint64_t u64;
156 uint64_t reserved_30_63:34;
157 uint64_t fallnop:1;
158 uint64_t fall8:1;
159 uint64_t reserved_26_27:2;
160 uint64_t sstep_go:1;
161 uint64_t sstep:1;
162 uint64_t reserved_22_23:2;
163 uint64_t clrdly:1;
164 uint64_t dec:1;
165 uint64_t inc:1;
166 uint64_t mux:1;
167 uint64_t offset:5;
168 uint64_t bitsel:5;
169 uint64_t offdly:6;
170 uint64_t dllfrc:1;
171 uint64_t dlldis:1;
173 uint64_t dlldis:1;
174 uint64_t dllfrc:1;
175 uint64_t offdly:6;
176 uint64_t bitsel:5;
177 uint64_t offset:5;
178 uint64_t mux:1;
179 uint64_t inc:1;
180 uint64_t dec:1;
181 uint64_t clrdly:1;
182 uint64_t reserved_22_23:2;
183 uint64_t sstep:1;
184 uint64_t sstep_go:1;
185 uint64_t reserved_26_27:2;
186 uint64_t fall8:1;
187 uint64_t fallnop:1;
188 uint64_t reserved_30_63:34;
198 uint64_t u64;
201 uint64_t reserved_9_63:55;
202 uint64_t testres:1;
203 uint64_t unxterm:1;
204 uint64_t muxsel:2;
205 uint64_t offset:5;
207 uint64_t offset:5;
208 uint64_t muxsel:2;
209 uint64_t unxterm:1;
210 uint64_t testres:1;
211 uint64_t reserved_9_63:55;
221 uint64_t u64;
224 uint64_t reserved_0_63:64;
226 uint64_t reserved_0_63:64;
231 uint64_t reserved_16_63:48;
232 uint64_t stx4ncmp:4;
233 uint64_t stx4pcmp:4;
234 uint64_t srx4cmp:8;
236 uint64_t srx4cmp:8;
237 uint64_t stx4pcmp:4;
238 uint64_t stx4ncmp:4;
239 uint64_t reserved_16_63:48;
245 uint64_t reserved_24_63:40;
246 uint64_t stx4ncmp:4;
247 uint64_t stx4pcmp:4;
248 uint64_t reserved_10_15:6;
249 uint64_t srx4cmp:10;
251 uint64_t srx4cmp:10;
252 uint64_t reserved_10_15:6;
253 uint64_t stx4pcmp:4;
254 uint64_t stx4ncmp:4;
255 uint64_t reserved_24_63:40;
262 uint64_t u64;
265 uint64_t reserved_9_63:55;
266 uint64_t prtnxa:1;
267 uint64_t dipcls:1;
268 uint64_t dippay:1;
269 uint64_t reserved_4_5:2;
270 uint64_t errcnt:4;
272 uint64_t errcnt:4;
273 uint64_t reserved_4_5:2;
274 uint64_t dippay:1;
275 uint64_t dipcls:1;
276 uint64_t prtnxa:1;
277 uint64_t reserved_9_63:55;
287 uint64_t u64;
290 uint64_t reserved_32_63:32;
291 uint64_t mul:1;
292 uint64_t reserved_14_30:17;
293 uint64_t calbnk:2;
294 uint64_t rsvop:4;
295 uint64_t prt:8;
297 uint64_t prt:8;
298 uint64_t rsvop:4;
299 uint64_t calbnk:2;
300 uint64_t reserved_14_30:17;
301 uint64_t mul:1;
302 uint64_t reserved_32_63:32;
312 uint64_t u64;
315 uint64_t reserved_12_63:52;
316 uint64_t calerr:1;
317 uint64_t syncerr:1;
318 uint64_t diperr:1;
319 uint64_t tpaovr:1;
320 uint64_t rsverr:1;
321 uint64_t drwnng:1;
322 uint64_t clserr:1;
323 uint64_t spiovr:1;
324 uint64_t reserved_2_3:2;
325 uint64_t abnorm:1;
326 uint64_t prtnxa:1;
328 uint64_t prtnxa:1;
329 uint64_t abnorm:1;
330 uint64_t reserved_2_3:2;
331 uint64_t spiovr:1;
332 uint64_t clserr:1;
333 uint64_t drwnng:1;
334 uint64_t rsverr:1;
335 uint64_t tpaovr:1;
336 uint64_t diperr:1;
337 uint64_t syncerr:1;
338 uint64_t calerr:1;
339 uint64_t reserved_12_63:52;
349 uint64_t u64;
352 uint64_t reserved_32_63:32;
353 uint64_t spf:1;
354 uint64_t reserved_12_30:19;
355 uint64_t calerr:1;
356 uint64_t syncerr:1;
357 uint64_t diperr:1;
358 uint64_t tpaovr:1;
359 uint64_t rsverr:1;
360 uint64_t drwnng:1;
361 uint64_t clserr:1;
362 uint64_t spiovr:1;
363 uint64_t reserved_2_3:2;
364 uint64_t abnorm:1;
365 uint64_t prtnxa:1;
367 uint64_t prtnxa:1;
368 uint64_t abnorm:1;
369 uint64_t reserved_2_3:2;
370 uint64_t spiovr:1;
371 uint64_t clserr:1;
372 uint64_t drwnng:1;
373 uint64_t rsverr:1;
374 uint64_t tpaovr:1;
375 uint64_t diperr:1;
376 uint64_t syncerr:1;
377 uint64_t calerr:1;
378 uint64_t reserved_12_30:19;
379 uint64_t spf:1;
380 uint64_t reserved_32_63:32;
390 uint64_t u64;
393 uint64_t reserved_12_63:52;
394 uint64_t calerr:1;
395 uint64_t syncerr:1;
396 uint64_t diperr:1;
397 uint64_t tpaovr:1;
398 uint64_t rsverr:1;
399 uint64_t drwnng:1;
400 uint64_t clserr:1;
401 uint64_t spiovr:1;
402 uint64_t reserved_2_3:2;
403 uint64_t abnorm:1;
404 uint64_t prtnxa:1;
406 uint64_t prtnxa:1;
407 uint64_t abnorm:1;
408 uint64_t reserved_2_3:2;
409 uint64_t spiovr:1;
410 uint64_t clserr:1;
411 uint64_t drwnng:1;
412 uint64_t rsverr:1;
413 uint64_t tpaovr:1;
414 uint64_t diperr:1;
415 uint64_t syncerr:1;
416 uint64_t calerr:1;
417 uint64_t reserved_12_63:52;
427 uint64_t u64;
430 uint64_t reserved_32_63:32;
431 uint64_t cnt:32;
433 uint64_t cnt:32;
434 uint64_t reserved_32_63:32;
444 uint64_t u64;
447 uint64_t reserved_32_63:32;
448 uint64_t max:32;
450 uint64_t max:32;
451 uint64_t reserved_32_63:32;
461 uint64_t u64;
464 uint64_t reserved_4_63:60;
465 uint64_t prtsel:4;
467 uint64_t prtsel:4;
468 uint64_t reserved_4_63:60;
478 uint64_t u64;
481 uint64_t reserved_13_63:51;
482 uint64_t trntest:1;
483 uint64_t jitter:3;
484 uint64_t clr_boot:1;
485 uint64_t set_boot:1;
486 uint64_t maxdist:5;
487 uint64_t macro_en:1;
488 uint64_t mux_en:1;
490 uint64_t mux_en:1;
491 uint64_t macro_en:1;
492 uint64_t maxdist:5;
493 uint64_t set_boot:1;
494 uint64_t clr_boot:1;
495 uint64_t jitter:3;
496 uint64_t trntest:1;
497 uint64_t reserved_13_63:51;