Lines Matching refs:uint64_t
45 uint64_t u64;
48 uint64_t chipkill:1;
49 uint64_t jtcsrdis:1;
50 uint64_t ejtagdis:1;
51 uint64_t romen:1;
52 uint64_t ckill_ppdis:1;
53 uint64_t jt_tstmode:1;
54 uint64_t vrm_err:1;
55 uint64_t reserved_37_56:20;
56 uint64_t c_mul:7;
57 uint64_t pnr_mul:6;
58 uint64_t reserved_21_23:3;
59 uint64_t lboot_oci:3;
60 uint64_t lboot_ext:6;
61 uint64_t lboot:10;
62 uint64_t rboot:1;
63 uint64_t rboot_pin:1;
65 uint64_t rboot_pin:1;
66 uint64_t rboot:1;
67 uint64_t lboot:10;
68 uint64_t lboot_ext:6;
69 uint64_t lboot_oci:3;
70 uint64_t reserved_21_23:3;
71 uint64_t pnr_mul:6;
72 uint64_t c_mul:7;
73 uint64_t reserved_37_56:20;
74 uint64_t vrm_err:1;
75 uint64_t jt_tstmode:1;
76 uint64_t ckill_ppdis:1;
77 uint64_t romen:1;
78 uint64_t ejtagdis:1;
79 uint64_t jtcsrdis:1;
80 uint64_t chipkill:1;
89 uint64_t u64;
92 uint64_t bist_delay:58;
93 uint64_t reserved_3_5:3;
94 uint64_t cntl_clr_bist:1;
95 uint64_t warm_clr_bist:1;
96 uint64_t soft_clr_bist:1;
98 uint64_t soft_clr_bist:1;
99 uint64_t warm_clr_bist:1;
100 uint64_t cntl_clr_bist:1;
101 uint64_t reserved_3_5:3;
102 uint64_t bist_delay:58;
111 uint64_t u64;
114 uint64_t reserved_47_63:17;
115 uint64_t timer:47;
117 uint64_t timer:47;
118 uint64_t reserved_47_63:17;
127 uint64_t u64;
130 uint64_t reserved_10_63:54;
131 uint64_t prst_link:1;
132 uint64_t rst_done:1;
133 uint64_t rst_link:1;
134 uint64_t host_mode:1;
135 uint64_t reserved_4_5:2;
136 uint64_t rst_drv:1;
137 uint64_t rst_rcv:1;
138 uint64_t rst_chip:1;
139 uint64_t rst_val:1;
141 uint64_t rst_val:1;
142 uint64_t rst_chip:1;
143 uint64_t rst_rcv:1;
144 uint64_t rst_drv:1;
145 uint64_t reserved_4_5:2;
146 uint64_t host_mode:1;
147 uint64_t rst_link:1;
148 uint64_t rst_done:1;
149 uint64_t prst_link:1;
150 uint64_t reserved_10_63:54;
159 uint64_t u64;
162 uint64_t reserved_32_63:32;
163 uint64_t warm_rst_dly:16;
164 uint64_t soft_rst_dly:16;
166 uint64_t soft_rst_dly:16;
167 uint64_t warm_rst_dly:16;
168 uint64_t reserved_32_63:32;
177 uint64_t u64;
180 uint64_t reserved_32_63:32;
181 uint64_t eco_rw:32;
183 uint64_t eco_rw:32;
184 uint64_t reserved_32_63:32;
191 uint64_t u64;
194 uint64_t reserved_12_63:52;
195 uint64_t perst:4;
196 uint64_t reserved_4_7:4;
197 uint64_t rst_link:4;
199 uint64_t rst_link:4;
200 uint64_t reserved_4_7:4;
201 uint64_t perst:4;
202 uint64_t reserved_12_63:52;
207 uint64_t reserved_11_63:53;
208 uint64_t perst:3;
209 uint64_t reserved_3_7:5;
210 uint64_t rst_link:3;
212 uint64_t rst_link:3;
213 uint64_t reserved_3_7:5;
214 uint64_t perst:3;
215 uint64_t reserved_11_63:53;
223 uint64_t u64;
226 uint64_t reserved_3_63:61;
227 uint64_t rst_link:3;
229 uint64_t rst_link:3;
230 uint64_t reserved_3_63:61;
237 uint64_t u64;
240 uint64_t reserved_3_63:61;
241 uint64_t str:3;
243 uint64_t str:3;
244 uint64_t reserved_3_63:61;
251 uint64_t u64;
254 uint64_t reserved_48_63:16;
255 uint64_t gate:48;
257 uint64_t gate:48;
258 uint64_t reserved_48_63:16;
263 uint64_t reserved_4_63:60;
264 uint64_t gate:4;
266 uint64_t gate:4;
267 uint64_t reserved_4_63:60;
275 uint64_t u64;
278 uint64_t reserved_1_63:63;
279 uint64_t soft_prst:1;
281 uint64_t soft_prst:1;
282 uint64_t reserved_1_63:63;
291 uint64_t u64;
294 uint64_t reserved_1_63:63;
295 uint64_t soft_rst:1;
297 uint64_t soft_rst:1;
298 uint64_t reserved_1_63:63;