Lines Matching refs:u64

246 	uint64_t u64;  member
296 cvmx_write_csr(CVMX_PIP_PRT_CFGX(port_num), port_cfg.u64); in cvmx_pip_config_port()
297 cvmx_write_csr(CVMX_PIP_PRT_TAGX(port_num), port_tag_cfg.u64); in cvmx_pip_config_port()
322 watcher_config.u64 = 0;
327 cvmx_write_csr(CVMX_PIP_QOS_WATCHX(watcher), watcher_config.u64);
341 pip_qos_vlanx.u64 = 0; in cvmx_pip_config_vlan_qos()
343 cvmx_write_csr(CVMX_PIP_QOS_VLANX(vlan_priority), pip_qos_vlanx.u64); in cvmx_pip_config_vlan_qos()
355 pip_qos_diffx.u64 = 0; in cvmx_pip_config_diffserv_qos()
357 cvmx_write_csr(CVMX_PIP_QOS_DIFFX(diffserv), pip_qos_diffx.u64); in cvmx_pip_config_diffserv_qos()
385 pip_stat_ctl.u64 = 0; in cvmx_pip_get_port_status()
387 cvmx_write_csr(CVMX_PIP_STAT_CTL, pip_stat_ctl.u64); in cvmx_pip_get_port_status()
389 stat0.u64 = cvmx_read_csr(CVMX_PIP_STAT0_PRTX(port_num)); in cvmx_pip_get_port_status()
390 stat1.u64 = cvmx_read_csr(CVMX_PIP_STAT1_PRTX(port_num)); in cvmx_pip_get_port_status()
391 stat2.u64 = cvmx_read_csr(CVMX_PIP_STAT2_PRTX(port_num)); in cvmx_pip_get_port_status()
392 stat3.u64 = cvmx_read_csr(CVMX_PIP_STAT3_PRTX(port_num)); in cvmx_pip_get_port_status()
393 stat4.u64 = cvmx_read_csr(CVMX_PIP_STAT4_PRTX(port_num)); in cvmx_pip_get_port_status()
394 stat5.u64 = cvmx_read_csr(CVMX_PIP_STAT5_PRTX(port_num)); in cvmx_pip_get_port_status()
395 stat6.u64 = cvmx_read_csr(CVMX_PIP_STAT6_PRTX(port_num)); in cvmx_pip_get_port_status()
396 stat7.u64 = cvmx_read_csr(CVMX_PIP_STAT7_PRTX(port_num)); in cvmx_pip_get_port_status()
397 stat8.u64 = cvmx_read_csr(CVMX_PIP_STAT8_PRTX(port_num)); in cvmx_pip_get_port_status()
398 stat9.u64 = cvmx_read_csr(CVMX_PIP_STAT9_PRTX(port_num)); in cvmx_pip_get_port_status()
399 pip_stat_inb_pktsx.u64 = in cvmx_pip_get_port_status()
401 pip_stat_inb_octsx.u64 = in cvmx_pip_get_port_status()
403 pip_stat_inb_errsx.u64 = in cvmx_pip_get_port_status()
467 config.u64 = 0; in cvmx_pip_config_crc()
470 cvmx_write_csr(CVMX_PIP_CRC_CTLX(interface), config.u64); in cvmx_pip_config_crc()
472 pip_crc_ivx.u64 = 0; in cvmx_pip_config_crc()
474 cvmx_write_csr(CVMX_PIP_CRC_IVX(interface), pip_crc_ivx.u64); in cvmx_pip_config_crc()
490 pip_tag_incx.u64 = 0; in cvmx_pip_tag_mask_clear()
493 cvmx_write_csr(CVMX_PIP_TAG_INCX(index), pip_tag_incx.u64); in cvmx_pip_tag_mask_clear()
517 pip_tag_incx.u64 = cvmx_read_csr(CVMX_PIP_TAG_INCX(index)); in cvmx_pip_tag_mask_set()
519 cvmx_write_csr(CVMX_PIP_TAG_INCX(index), pip_tag_incx.u64); in cvmx_pip_tag_mask_set()