Lines Matching refs:uint64_t

37 	uint64_t u64;
40 uint64_t reserved_29_63:35;
41 uint64_t clkdiv:13;
42 uint64_t csena3:1;
43 uint64_t csena2:1;
44 uint64_t csena1:1;
45 uint64_t csena0:1;
46 uint64_t cslate:1;
47 uint64_t tritx:1;
48 uint64_t idleclks:2;
49 uint64_t cshi:1;
50 uint64_t csena:1;
51 uint64_t int_ena:1;
52 uint64_t lsbfirst:1;
53 uint64_t wireor:1;
54 uint64_t clk_cont:1;
55 uint64_t idlelo:1;
56 uint64_t enable:1;
58 uint64_t enable:1;
59 uint64_t idlelo:1;
60 uint64_t clk_cont:1;
61 uint64_t wireor:1;
62 uint64_t lsbfirst:1;
63 uint64_t int_ena:1;
64 uint64_t csena:1;
65 uint64_t cshi:1;
66 uint64_t idleclks:2;
67 uint64_t tritx:1;
68 uint64_t cslate:1;
69 uint64_t csena0:1;
70 uint64_t csena1:1;
71 uint64_t csena2:1;
72 uint64_t csena3:1;
73 uint64_t clkdiv:13;
74 uint64_t reserved_29_63:35;
79 uint64_t reserved_29_63:35;
80 uint64_t clkdiv:13;
81 uint64_t reserved_12_15:4;
82 uint64_t cslate:1;
83 uint64_t tritx:1;
84 uint64_t idleclks:2;
85 uint64_t cshi:1;
86 uint64_t csena:1;
87 uint64_t int_ena:1;
88 uint64_t lsbfirst:1;
89 uint64_t wireor:1;
90 uint64_t clk_cont:1;
91 uint64_t idlelo:1;
92 uint64_t enable:1;
94 uint64_t enable:1;
95 uint64_t idlelo:1;
96 uint64_t clk_cont:1;
97 uint64_t wireor:1;
98 uint64_t lsbfirst:1;
99 uint64_t int_ena:1;
100 uint64_t csena:1;
101 uint64_t cshi:1;
102 uint64_t idleclks:2;
103 uint64_t tritx:1;
104 uint64_t cslate:1;
105 uint64_t reserved_12_15:4;
106 uint64_t clkdiv:13;
107 uint64_t reserved_29_63:35;
112 uint64_t reserved_29_63:35;
113 uint64_t clkdiv:13;
114 uint64_t reserved_11_15:5;
115 uint64_t tritx:1;
116 uint64_t idleclks:2;
117 uint64_t cshi:1;
118 uint64_t csena:1;
119 uint64_t int_ena:1;
120 uint64_t lsbfirst:1;
121 uint64_t wireor:1;
122 uint64_t clk_cont:1;
123 uint64_t idlelo:1;
124 uint64_t enable:1;
126 uint64_t enable:1;
127 uint64_t idlelo:1;
128 uint64_t clk_cont:1;
129 uint64_t wireor:1;
130 uint64_t lsbfirst:1;
131 uint64_t int_ena:1;
132 uint64_t csena:1;
133 uint64_t cshi:1;
134 uint64_t idleclks:2;
135 uint64_t tritx:1;
136 uint64_t reserved_11_15:5;
137 uint64_t clkdiv:13;
138 uint64_t reserved_29_63:35;
144 uint64_t reserved_29_63:35;
145 uint64_t clkdiv:13;
146 uint64_t reserved_14_15:2;
147 uint64_t csena1:1;
148 uint64_t csena0:1;
149 uint64_t cslate:1;
150 uint64_t tritx:1;
151 uint64_t idleclks:2;
152 uint64_t cshi:1;
153 uint64_t reserved_6_6:1;
154 uint64_t int_ena:1;
155 uint64_t lsbfirst:1;
156 uint64_t wireor:1;
157 uint64_t clk_cont:1;
158 uint64_t idlelo:1;
159 uint64_t enable:1;
161 uint64_t enable:1;
162 uint64_t idlelo:1;
163 uint64_t clk_cont:1;
164 uint64_t wireor:1;
165 uint64_t lsbfirst:1;
166 uint64_t int_ena:1;
167 uint64_t reserved_6_6:1;
168 uint64_t cshi:1;
169 uint64_t idleclks:2;
170 uint64_t tritx:1;
171 uint64_t cslate:1;
172 uint64_t csena0:1;
173 uint64_t csena1:1;
174 uint64_t reserved_14_15:2;
175 uint64_t clkdiv:13;
176 uint64_t reserved_29_63:35;
181 uint64_t reserved_29_63:35;
182 uint64_t clkdiv:13;
183 uint64_t csena3:1;
184 uint64_t csena2:1;
185 uint64_t reserved_12_13:2;
186 uint64_t cslate:1;
187 uint64_t tritx:1;
188 uint64_t idleclks:2;
189 uint64_t cshi:1;
190 uint64_t reserved_6_6:1;
191 uint64_t int_ena:1;
192 uint64_t lsbfirst:1;
193 uint64_t wireor:1;
194 uint64_t clk_cont:1;
195 uint64_t idlelo:1;
196 uint64_t enable:1;
198 uint64_t enable:1;
199 uint64_t idlelo:1;
200 uint64_t clk_cont:1;
201 uint64_t wireor:1;
202 uint64_t lsbfirst:1;
203 uint64_t int_ena:1;
204 uint64_t reserved_6_6:1;
205 uint64_t cshi:1;
206 uint64_t idleclks:2;
207 uint64_t tritx:1;
208 uint64_t cslate:1;
209 uint64_t reserved_12_13:2;
210 uint64_t csena2:1;
211 uint64_t csena3:1;
212 uint64_t clkdiv:13;
213 uint64_t reserved_29_63:35;
220 uint64_t u64;
223 uint64_t reserved_8_63:56;
224 uint64_t data:8;
226 uint64_t data:8;
227 uint64_t reserved_8_63:56;
239 uint64_t u64;
242 uint64_t reserved_13_63:51;
243 uint64_t rxnum:5;
244 uint64_t reserved_1_7:7;
245 uint64_t busy:1;
247 uint64_t busy:1;
248 uint64_t reserved_1_7:7;
249 uint64_t rxnum:5;
250 uint64_t reserved_13_63:51;
262 uint64_t u64;
265 uint64_t reserved_22_63:42;
266 uint64_t csid:2;
267 uint64_t reserved_17_19:3;
268 uint64_t leavecs:1;
269 uint64_t reserved_13_15:3;
270 uint64_t txnum:5;
271 uint64_t reserved_5_7:3;
272 uint64_t totnum:5;
274 uint64_t totnum:5;
275 uint64_t reserved_5_7:3;
276 uint64_t txnum:5;
277 uint64_t reserved_13_15:3;
278 uint64_t leavecs:1;
279 uint64_t reserved_17_19:3;
280 uint64_t csid:2;
281 uint64_t reserved_22_63:42;
286 uint64_t reserved_17_63:47;
287 uint64_t leavecs:1;
288 uint64_t reserved_13_15:3;
289 uint64_t txnum:5;
290 uint64_t reserved_5_7:3;
291 uint64_t totnum:5;
293 uint64_t totnum:5;
294 uint64_t reserved_5_7:3;
295 uint64_t txnum:5;
296 uint64_t reserved_13_15:3;
297 uint64_t leavecs:1;
298 uint64_t reserved_17_63:47;
305 uint64_t reserved_21_63:43;
306 uint64_t csid:1;
307 uint64_t reserved_17_19:3;
308 uint64_t leavecs:1;
309 uint64_t reserved_13_15:3;
310 uint64_t txnum:5;
311 uint64_t reserved_5_7:3;
312 uint64_t totnum:5;
314 uint64_t totnum:5;
315 uint64_t reserved_5_7:3;
316 uint64_t txnum:5;
317 uint64_t reserved_13_15:3;
318 uint64_t leavecs:1;
319 uint64_t reserved_17_19:3;
320 uint64_t csid:1;
321 uint64_t reserved_21_63:43;