145 	unsigned int mask = 0x100 << cd->bit;  in octeon_irq_core_set_enable_local()  local
151 		set_c0_status(mask);  in octeon_irq_core_set_enable_local()
153 		clear_c0_status(mask);  in octeon_irq_core_set_enable_local()
228 	struct cpumask *mask = irq_data_get_affinity_mask(data);  in next_cpu_for_irq()  local
229 	int weight = cpumask_weight(mask);  in next_cpu_for_irq()
235 			cpu = cpumask_next(cpu, mask);  in next_cpu_for_irq()
244 		cpu = cpumask_first(mask);  in next_cpu_for_irq()
425 	u64 mask;  in octeon_irq_ciu_enable_v2()  local
430 	mask = 1ull << (cd->bit);  in octeon_irq_ciu_enable_v2()
439 		cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask);  in octeon_irq_ciu_enable_v2()
443 		cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask);  in octeon_irq_ciu_enable_v2()
452 	u64 mask;  in octeon_irq_ciu_enable_sum2()  local
458 	mask = 1ull << (cd->bit);  in octeon_irq_ciu_enable_sum2()
460 	cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1S(index), mask);  in octeon_irq_ciu_enable_sum2()
468 	u64 mask;  in octeon_irq_ciu_disable_local_sum2()  local
474 	mask = 1ull << (cd->bit);  in octeon_irq_ciu_disable_local_sum2()
476 	cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1C(index), mask);  in octeon_irq_ciu_disable_local_sum2()
481 	u64 mask;  in octeon_irq_ciu_ack_sum2()  local
487 	mask = 1ull << (cd->bit);  in octeon_irq_ciu_ack_sum2()
489 	cvmx_write_csr(CVMX_CIU_SUM2_PPX_IP4(index), mask);  in octeon_irq_ciu_ack_sum2()
496 	u64 mask;  in octeon_irq_ciu_disable_all_sum2()  local
499 	mask = 1ull << (cd->bit);  in octeon_irq_ciu_disable_all_sum2()
504 		cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1C(coreid), mask);  in octeon_irq_ciu_disable_all_sum2()
514 	u64 mask;  in octeon_irq_ciu_enable_local_v2()  local
518 	mask = 1ull << (cd->bit);  in octeon_irq_ciu_enable_local_v2()
523 		cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask);  in octeon_irq_ciu_enable_local_v2()
527 		cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask);  in octeon_irq_ciu_enable_local_v2()
533 	u64 mask;  in octeon_irq_ciu_disable_local_v2()  local
537 	mask = 1ull << (cd->bit);  in octeon_irq_ciu_disable_local_v2()
542 		cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask);  in octeon_irq_ciu_disable_local_v2()
546 		cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask);  in octeon_irq_ciu_disable_local_v2()
555 	u64 mask;  in octeon_irq_ciu_ack()  local
559 	mask = 1ull << (cd->bit);  in octeon_irq_ciu_ack()
563 		cvmx_write_csr(CVMX_CIU_INTX_SUM0(index), mask);  in octeon_irq_ciu_ack()
565 		cvmx_write_csr(CVMX_CIU_INT_SUM1, mask);  in octeon_irq_ciu_ack()
576 	u64 mask;  in octeon_irq_ciu_disable_all_v2()  local
580 	mask = 1ull << (cd->bit);  in octeon_irq_ciu_disable_all_v2()
587 			cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask);  in octeon_irq_ciu_disable_all_v2()
594 			cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask);  in octeon_irq_ciu_disable_all_v2()
606 	u64 mask;  in octeon_irq_ciu_enable_all_v2()  local
610 	mask = 1ull << (cd->bit);  in octeon_irq_ciu_enable_all_v2()
617 			cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask);  in octeon_irq_ciu_enable_all_v2()
624 			cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask);  in octeon_irq_ciu_enable_all_v2()
697 	u64 mask;  in octeon_irq_ciu_gpio_ack()  local
700 	mask = 1ull << (cd->gpio_line);  in octeon_irq_ciu_gpio_ack()
702 	cvmx_write_csr(CVMX_GPIO_INT_CLR, mask);  in octeon_irq_ciu_gpio_ack()
711 	struct cpumask *mask = irq_data_get_affinity_mask(data);  in octeon_irq_cpu_offline_ciu()  local
713 	if (!cpumask_test_cpu(cpu, mask))  in octeon_irq_cpu_offline_ciu()
716 	if (cpumask_weight(mask) > 1) {  in octeon_irq_cpu_offline_ciu()
721 		cpumask_copy(&new_affinity, mask);  in octeon_irq_cpu_offline_ciu()
798 	u64 mask;  in octeon_irq_ciu_set_affinity_v2()  local
805 	mask = 1ull << cd->bit;  in octeon_irq_ciu_set_affinity_v2()
814 				cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask);  in octeon_irq_ciu_set_affinity_v2()
817 				cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask);  in octeon_irq_ciu_set_affinity_v2()
827 				cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask);  in octeon_irq_ciu_set_affinity_v2()
830 				cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask);  in octeon_irq_ciu_set_affinity_v2()
843 	u64 mask;  in octeon_irq_ciu_set_affinity_sum2()  local
850 	mask = 1ull << cd->bit;  in octeon_irq_ciu_set_affinity_sum2()
857 			cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1S(index), mask);  in octeon_irq_ciu_set_affinity_sum2()
859 			cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1C(index), mask);  in octeon_irq_ciu_set_affinity_sum2()
1598 	u64 mask;  in octeon_irq_ciu2_wd_enable()  local
1604 	mask = 1ull << (cd->bit);  in octeon_irq_ciu2_wd_enable()
1608 	cvmx_write_csr(en_addr, mask);  in octeon_irq_ciu2_wd_enable()
1614 	u64 mask;  in octeon_irq_ciu2_enable()  local
1621 	mask = 1ull << (cd->bit);  in octeon_irq_ciu2_enable()
1625 	cvmx_write_csr(en_addr, mask);  in octeon_irq_ciu2_enable()
1630 	u64 mask;  in octeon_irq_ciu2_enable_local()  local
1636 	mask = 1ull << (cd->bit);  in octeon_irq_ciu2_enable_local()
1640 	cvmx_write_csr(en_addr, mask);  in octeon_irq_ciu2_enable_local()
1646 	u64 mask;  in octeon_irq_ciu2_disable_local()  local
1652 	mask = 1ull << (cd->bit);  in octeon_irq_ciu2_disable_local()
1656 	cvmx_write_csr(en_addr, mask);  in octeon_irq_ciu2_disable_local()
1662 	u64 mask;  in octeon_irq_ciu2_ack()  local
1668 	mask = 1ull << (cd->bit);  in octeon_irq_ciu2_ack()
1671 	cvmx_write_csr(en_addr, mask);  in octeon_irq_ciu2_ack()
1678 	u64 mask;  in octeon_irq_ciu2_disable_all()  local
1682 	mask = 1ull << (cd->bit);  in octeon_irq_ciu2_disable_all()
1687 		cvmx_write_csr(en_addr, mask);  in octeon_irq_ciu2_disable_all()
1694 	u64 mask;  in octeon_irq_ciu2_mbox_enable_all()  local
1696 	mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0);  in octeon_irq_ciu2_mbox_enable_all()
1701 		cvmx_write_csr(en_addr, mask);  in octeon_irq_ciu2_mbox_enable_all()
1708 	u64 mask;  in octeon_irq_ciu2_mbox_disable_all()  local
1710 	mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0);  in octeon_irq_ciu2_mbox_disable_all()
1715 		cvmx_write_csr(en_addr, mask);  in octeon_irq_ciu2_mbox_disable_all()
1721 	u64 mask;  in octeon_irq_ciu2_mbox_enable_local()  local
1725 	mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0);  in octeon_irq_ciu2_mbox_enable_local()
1727 	cvmx_write_csr(en_addr, mask);  in octeon_irq_ciu2_mbox_enable_local()
1732 	u64 mask;  in octeon_irq_ciu2_mbox_disable_local()  local
1736 	mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0);  in octeon_irq_ciu2_mbox_disable_local()
1738 	cvmx_write_csr(en_addr, mask);  in octeon_irq_ciu2_mbox_disable_local()
1747 	u64 mask;  in octeon_irq_ciu2_set_affinity()  local
1754 	mask = 1ull << cd->bit;  in octeon_irq_ciu2_set_affinity()
1768 		cvmx_write_csr(en_addr, mask);  in octeon_irq_ciu2_set_affinity()