Lines Matching refs:u64
207 spxx_int_msk.u64 = cvmx_read_csr(CVMX_SPXX_INT_MSK(interface)); in cvmx_spi_reset_cb()
209 stxx_int_msk.u64 = cvmx_read_csr(CVMX_STXX_INT_MSK(interface)); in cvmx_spi_reset_cb()
215 spxx_clk_ctl.u64 = 0; in cvmx_spi_reset_cb()
217 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); in cvmx_spi_reset_cb()
219 spxx_bist_stat.u64 = cvmx_read_csr(CVMX_SPXX_BIST_STAT(interface)); in cvmx_spi_reset_cb()
236 srxx_spi4_calx.u64 = 0; in cvmx_spi_reset_cb()
239 srxx_spi4_calx.u64); in cvmx_spi_reset_cb()
241 stxx_spi4_calx.u64 = 0; in cvmx_spi_reset_cb()
244 stxx_spi4_calx.u64); in cvmx_spi_reset_cb()
250 cvmx_write_csr(CVMX_SPXX_INT_MSK(interface), spxx_int_msk.u64); in cvmx_spi_reset_cb()
253 cvmx_write_csr(CVMX_STXX_INT_MSK(interface), stxx_int_msk.u64); in cvmx_spi_reset_cb()
256 spxx_clk_ctl.u64 = 0; in cvmx_spi_reset_cb()
267 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); in cvmx_spi_reset_cb()
272 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); in cvmx_spi_reset_cb()
288 cvmx_write_csr(CVMX_SPXX_TRN4_CTL(interface), spxx_trn4_ctl.u64); in cvmx_spi_reset_cb()
290 spxx_dbg_deskew_ctl.u64 = 0; in cvmx_spi_reset_cb()
292 spxx_dbg_deskew_ctl.u64); in cvmx_spi_reset_cb()
321 srxx_com_ctl.u64 = 0; in cvmx_spi_calendar_setup_cb()
325 cvmx_write_csr(CVMX_SRXX_COM_CTL(interface), srxx_com_ctl.u64); in cvmx_spi_calendar_setup_cb()
332 srxx_spi4_calx.u64 = 0; in cvmx_spi_calendar_setup_cb()
338 ~(cvmx_dpop(srxx_spi4_calx.u64) & 1); in cvmx_spi_calendar_setup_cb()
340 srxx_spi4_calx.u64); in cvmx_spi_calendar_setup_cb()
343 srxx_spi4_stat.u64 = 0; in cvmx_spi_calendar_setup_cb()
347 srxx_spi4_stat.u64); in cvmx_spi_calendar_setup_cb()
359 stxx_arb_ctl.u64 = 0; in cvmx_spi_calendar_setup_cb()
362 cvmx_write_csr(CVMX_STXX_ARB_CTL(interface), stxx_arb_ctl.u64); in cvmx_spi_calendar_setup_cb()
364 gmxx_tx_spi_max.u64 = 0; in cvmx_spi_calendar_setup_cb()
369 gmxx_tx_spi_max.u64); in cvmx_spi_calendar_setup_cb()
371 gmxx_tx_spi_thresh.u64 = 0; in cvmx_spi_calendar_setup_cb()
374 gmxx_tx_spi_thresh.u64); in cvmx_spi_calendar_setup_cb()
376 gmxx_tx_spi_ctl.u64 = 0; in cvmx_spi_calendar_setup_cb()
380 gmxx_tx_spi_ctl.u64); in cvmx_spi_calendar_setup_cb()
383 stxx_spi4_dat.u64 = 0; in cvmx_spi_calendar_setup_cb()
388 stxx_spi4_dat.u64); in cvmx_spi_calendar_setup_cb()
395 stxx_spi4_calx.u64 = 0; in cvmx_spi_calendar_setup_cb()
401 ~(cvmx_dpop(stxx_spi4_calx.u64) & 1); in cvmx_spi_calendar_setup_cb()
403 stxx_spi4_calx.u64); in cvmx_spi_calendar_setup_cb()
406 stxx_spi4_stat.u64 = 0; in cvmx_spi_calendar_setup_cb()
410 stxx_spi4_stat.u64); in cvmx_spi_calendar_setup_cb()
449 stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface)); in cvmx_spi_clock_detect_cb()
456 cvmx_write_csr(CVMX_SPXX_CLK_STAT(interface), stat.u64); in cvmx_spi_clock_detect_cb()
474 stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface)); in cvmx_spi_clock_detect_cb()
481 cvmx_write_csr(CVMX_SPXX_CLK_STAT(interface), stat.u64); in cvmx_spi_clock_detect_cb()
518 spxx_clk_ctl.u64 = 0; in cvmx_spi_training_cb()
529 cvmx_write_csr(CVMX_SPXX_CLK_CTL(interface), spxx_clk_ctl.u64); in cvmx_spi_training_cb()
533 spxx_trn4_ctl.u64 = cvmx_read_csr(CVMX_SPXX_TRN4_CTL(interface)); in cvmx_spi_training_cb()
535 cvmx_write_csr(CVMX_SPXX_TRN4_CTL(interface), spxx_trn4_ctl.u64); in cvmx_spi_training_cb()
548 stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface)); in cvmx_spi_training_cb()
551 cvmx_write_csr(CVMX_SPXX_CLK_STAT(interface), stat.u64); in cvmx_spi_training_cb()
586 srxx_com_ctl.u64 = cvmx_read_csr(CVMX_SRXX_COM_CTL(interface)); in cvmx_spi_calendar_sync_cb()
589 cvmx_write_csr(CVMX_SRXX_COM_CTL(interface), srxx_com_ctl.u64); in cvmx_spi_calendar_sync_cb()
599 stxx_com_ctl.u64 = 0; in cvmx_spi_calendar_sync_cb()
601 cvmx_write_csr(CVMX_STXX_COM_CTL(interface), stxx_com_ctl.u64); in cvmx_spi_calendar_sync_cb()
609 stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface)); in cvmx_spi_calendar_sync_cb()
641 srxx_com_ctl.u64 = cvmx_read_csr(CVMX_SRXX_COM_CTL(interface)); in cvmx_spi_interface_up_cb()
643 cvmx_write_csr(CVMX_SRXX_COM_CTL(interface), srxx_com_ctl.u64); in cvmx_spi_interface_up_cb()
649 stxx_com_ctl.u64 = cvmx_read_csr(CVMX_STXX_COM_CTL(interface)); in cvmx_spi_interface_up_cb()
651 cvmx_write_csr(CVMX_STXX_COM_CTL(interface), stxx_com_ctl.u64); in cvmx_spi_interface_up_cb()
655 gmxx_rxx_frm_min.u64 = 0; in cvmx_spi_interface_up_cb()
658 gmxx_rxx_frm_min.u64); in cvmx_spi_interface_up_cb()
659 gmxx_rxx_frm_max.u64 = 0; in cvmx_spi_interface_up_cb()
662 gmxx_rxx_frm_max.u64); in cvmx_spi_interface_up_cb()
663 gmxx_rxx_jabber.u64 = 0; in cvmx_spi_interface_up_cb()
665 cvmx_write_csr(CVMX_GMXX_RXX_JABBER(0, interface), gmxx_rxx_jabber.u64); in cvmx_spi_interface_up_cb()