433 	union cvmx_spxx_clk_stat stat;  in cvmx_spi_clock_detect_cb()  local
449 		stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface));  in cvmx_spi_clock_detect_cb()
450 		if (stat.s.s4clk0 && stat.s.s4clk1 && clock_transitions) {  in cvmx_spi_clock_detect_cb()
456 			cvmx_write_csr(CVMX_SPXX_CLK_STAT(interface), stat.u64);  in cvmx_spi_clock_detect_cb()
457 			stat.s.s4clk0 = 0;  in cvmx_spi_clock_detect_cb()
458 			stat.s.s4clk1 = 0;  in cvmx_spi_clock_detect_cb()
464 	} while (stat.s.s4clk0 == 0 || stat.s.s4clk1 == 0);  in cvmx_spi_clock_detect_cb()
474 		stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface));  in cvmx_spi_clock_detect_cb()
475 		if (stat.s.d4clk0 && stat.s.d4clk1 && clock_transitions) {  in cvmx_spi_clock_detect_cb()
481 			cvmx_write_csr(CVMX_SPXX_CLK_STAT(interface), stat.u64);  in cvmx_spi_clock_detect_cb()
482 			stat.s.d4clk0 = 0;  in cvmx_spi_clock_detect_cb()
483 			stat.s.d4clk1 = 0;  in cvmx_spi_clock_detect_cb()
489 	} while (stat.s.d4clk0 == 0 || stat.s.d4clk1 == 0);  in cvmx_spi_clock_detect_cb()
511 	union cvmx_spxx_clk_stat stat;  in cvmx_spi_training_cb()  local
548 		stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface));  in cvmx_spi_training_cb()
549 		if (stat.s.srxtrn && rx_training_needed) {  in cvmx_spi_training_cb()
551 			cvmx_write_csr(CVMX_SPXX_CLK_STAT(interface), stat.u64);  in cvmx_spi_training_cb()
552 			stat.s.srxtrn = 0;  in cvmx_spi_training_cb()
558 	} while (stat.s.srxtrn == 0);  in cvmx_spi_training_cb()
596 		union cvmx_spxx_clk_stat stat;  in cvmx_spi_calendar_sync_cb()  local
609 			stat.u64 = cvmx_read_csr(CVMX_SPXX_CLK_STAT(interface));  in cvmx_spi_calendar_sync_cb()
614 		} while (stat.s.stxcal == 0);  in cvmx_spi_calendar_sync_cb()