138 	struct resource res[4];  in ath79_register_pci_ar71xx()  local
140 	memset(res, 0, sizeof(res));  in ath79_register_pci_ar71xx()
142 	res[0].name = "cfg_base";  in ath79_register_pci_ar71xx()
143 	res[0].flags = IORESOURCE_MEM;  in ath79_register_pci_ar71xx()
144 	res[0].start = AR71XX_PCI_CFG_BASE;  in ath79_register_pci_ar71xx()
145 	res[0].end = AR71XX_PCI_CFG_BASE + AR71XX_PCI_CFG_SIZE - 1;  in ath79_register_pci_ar71xx()
147 	res[1].flags = IORESOURCE_IRQ;  in ath79_register_pci_ar71xx()
148 	res[1].start = ATH79_CPU_IRQ(2);  in ath79_register_pci_ar71xx()
149 	res[1].end = ATH79_CPU_IRQ(2);  in ath79_register_pci_ar71xx()
151 	res[2].name = "io_base";  in ath79_register_pci_ar71xx()
152 	res[2].flags = IORESOURCE_IO;  in ath79_register_pci_ar71xx()
153 	res[2].start = 0;  in ath79_register_pci_ar71xx()
154 	res[2].end = 0;  in ath79_register_pci_ar71xx()
156 	res[3].name = "mem_base";  in ath79_register_pci_ar71xx()
157 	res[3].flags = IORESOURCE_MEM;  in ath79_register_pci_ar71xx()
158 	res[3].start = AR71XX_PCI_MEM_BASE;  in ath79_register_pci_ar71xx()
159 	res[3].end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1;  in ath79_register_pci_ar71xx()
162 					       res, ARRAY_SIZE(res));  in ath79_register_pci_ar71xx()
177 	struct resource res[6];  in ath79_register_pci_ar724x()  local
179 	memset(res, 0, sizeof(res));  in ath79_register_pci_ar724x()
181 	res[0].name = "cfg_base";  in ath79_register_pci_ar724x()
182 	res[0].flags = IORESOURCE_MEM;  in ath79_register_pci_ar724x()
183 	res[0].start = cfg_base;  in ath79_register_pci_ar724x()
184 	res[0].end = cfg_base + AR724X_PCI_CFG_SIZE - 1;  in ath79_register_pci_ar724x()
186 	res[1].name = "ctrl_base";  in ath79_register_pci_ar724x()
187 	res[1].flags = IORESOURCE_MEM;  in ath79_register_pci_ar724x()
188 	res[1].start = ctrl_base;  in ath79_register_pci_ar724x()
189 	res[1].end = ctrl_base + AR724X_PCI_CTRL_SIZE - 1;  in ath79_register_pci_ar724x()
191 	res[2].flags = IORESOURCE_IRQ;  in ath79_register_pci_ar724x()
192 	res[2].start = irq;  in ath79_register_pci_ar724x()
193 	res[2].end = irq;  in ath79_register_pci_ar724x()
195 	res[3].name = "mem_base";  in ath79_register_pci_ar724x()
196 	res[3].flags = IORESOURCE_MEM;  in ath79_register_pci_ar724x()
197 	res[3].start = mem_base;  in ath79_register_pci_ar724x()
198 	res[3].end = mem_base + mem_size - 1;  in ath79_register_pci_ar724x()
200 	res[4].name = "io_base";  in ath79_register_pci_ar724x()
201 	res[4].flags = IORESOURCE_IO;  in ath79_register_pci_ar724x()
202 	res[4].start = io_base;  in ath79_register_pci_ar724x()
203 	res[4].end = io_base;  in ath79_register_pci_ar724x()
205 	res[5].name = "crp_base";  in ath79_register_pci_ar724x()
206 	res[5].flags = IORESOURCE_MEM;  in ath79_register_pci_ar724x()
207 	res[5].start = crp_base;  in ath79_register_pci_ar724x()
208 	res[5].end = crp_base + AR724X_PCI_CRP_SIZE - 1;  in ath79_register_pci_ar724x()
211 					       res, ARRAY_SIZE(res));  in ath79_register_pci_ar724x()