247 	u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv;  in ar934x_clocks_init()  local
316 	postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) &  in ar934x_clocks_init()
322 		cpu_rate = cpu_pll / (postdiv + 1);  in ar934x_clocks_init()
324 		cpu_rate = ddr_pll / (postdiv + 1);  in ar934x_clocks_init()
326 	postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) &  in ar934x_clocks_init()
332 		ddr_rate = ddr_pll / (postdiv + 1);  in ar934x_clocks_init()
334 		ddr_rate = cpu_pll / (postdiv + 1);  in ar934x_clocks_init()
336 	postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) &  in ar934x_clocks_init()
342 		ahb_rate = ddr_pll / (postdiv + 1);  in ar934x_clocks_init()
344 		ahb_rate = cpu_pll / (postdiv + 1);  in ar934x_clocks_init()
363 	u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;  in qca955x_clocks_init()  local
403 	postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) &  in qca955x_clocks_init()
409 		cpu_rate = ddr_pll / (postdiv + 1);  in qca955x_clocks_init()
411 		cpu_rate = cpu_pll / (postdiv + 1);  in qca955x_clocks_init()
413 	postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) &  in qca955x_clocks_init()
419 		ddr_rate = cpu_pll / (postdiv + 1);  in qca955x_clocks_init()
421 		ddr_rate = ddr_pll / (postdiv + 1);  in qca955x_clocks_init()
423 	postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) &  in qca955x_clocks_init()
429 		ahb_rate = ddr_pll / (postdiv + 1);  in qca955x_clocks_init()
431 		ahb_rate = cpu_pll / (postdiv + 1);  in qca955x_clocks_init()