Lines Matching refs:mul
83 u32 mul; member
112 int *postdiv, int *mul) in approximate() argument
121 *mul = i; in approximate()
129 int *mul) in calculate() argument
136 *mul = target / tmp_gcd; in calculate()
138 if ((*mul < 1) || (*mul >= 16)) in calculate()
144 if (base / *prediv * *mul / *postdiv != target) { in calculate()
145 approximate(base, target, prediv, postdiv, mul); in calculate()
146 tmp_freq = base / *prediv * *mul / *postdiv; in calculate()
153 *prediv, *postdiv, *mul); in calculate()
182 int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1; in tnetd7300_get_clock() local
203 return (base_clock >> (mul / 16 + 1)) / divisor; in tnetd7300_get_clock()
206 product = (mul & 1) ? in tnetd7300_get_clock()
207 (base_clock * mul) >> 1 : in tnetd7300_get_clock()
208 (base_clock * (mul - 1)) >> 2; in tnetd7300_get_clock()
212 if (mul == 16) in tnetd7300_get_clock()
215 return base_clock * mul / divisor; in tnetd7300_get_clock()
221 int prediv, postdiv, mul; in tnetd7300_set_clock() local
239 calculate(base_clock, frequency, &prediv, &postdiv, &mul); in tnetd7300_set_clock()
246 writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll); in tnetd7300_set_clock()
275 int prediv, int postdiv, int postdiv2, int mul, u32 frequency) in tnetd7200_set_clock() argument
280 base, frequency, prediv, postdiv, postdiv2, mul); in tnetd7200_set_clock()
284 writel((mul - 1) & 0xF, &clock->mul); in tnetd7200_set_clock()