Lines Matching refs:u_char
168 u_char pad1;
169 u_char bas_hi;
170 u_char pad2;
171 u_char bas_md;
172 u_char pad3;
173 u_char volatile vcounthi;
174 u_char pad4;
175 u_char volatile vcountmid;
176 u_char pad5;
177 u_char volatile vcountlow;
178 u_char volatile syncmode;
179 u_char pad6;
180 u_char pad7;
181 u_char bas_lo;
196 u_char char_dummy0;
197 u_char bas_hi; /* video mem base addr, high and mid byte */
198 u_char char_dummy1;
199 u_char bas_md;
200 u_char char_dummy2;
201 u_char vcount_hi; /* pointer to currently displayed byte */
202 u_char char_dummy3;
203 u_char vcount_md;
204 u_char char_dummy4;
205 u_char vcount_lo;
207 u_char char_dummy5;
208 u_char bas_lo; /* video mem addr, low byte */
209 u_char char_dummy6[2+3*16];
212 u_char st_shiftmode; /* ST compatible shift mode register, unused */
213 u_char char_dummy7;
251 #define f030_hscroll ((u_char*) 0xffff8265)
257 u_char xoffset_s;
258 u_char xoffset;
260 u_char pad2[0x1a];
267 u_char pad3[0x14];
274 u_char pad4[0x12];
289 u_char dma_vhi; /* Some extended ST-DMAs can handle 32 bit addresses */
290 u_char dma_hi;
291 u_char char_dummy2;
292 u_char dma_md;
293 u_char char_dummy3;
294 u_char dma_lo;
313 u_char rd_data_reg_sel;
314 u_char char_dummy1;
315 u_char wd_data;
323 u_char char_dummy0;
324 u_char dma_addr_hi;
325 u_char char_dummy1;
326 u_char dma_addr_hmd;
327 u_char char_dummy2;
328 u_char dma_addr_lmd;
329 u_char char_dummy3;
330 u_char dma_addr_lo;
331 u_char char_dummy4;
332 u_char dma_cnt_hi;
333 u_char char_dummy5;
334 u_char dma_cnt_hmd;
335 u_char char_dummy6;
336 u_char dma_cnt_lmd;
337 u_char char_dummy7;
338 u_char dma_cnt_lo;
348 u_char scsi_data;
349 u_char char_dummy1;
350 u_char scsi_icr;
351 u_char char_dummy2;
352 u_char scsi_mode;
353 u_char char_dummy3;
354 u_char scsi_tcr;
355 u_char char_dummy4;
356 u_char scsi_idstat;
357 u_char char_dummy5;
358 u_char scsi_dmastat;
359 u_char char_dummy6;
360 u_char scsi_targrcv;
361 u_char char_dummy7;
362 u_char scsi_inircv;
377 u_char external_frequency_divider;
378 u_char internal_frequency_divider;
385 u_char tracks;
386 u_char input_source;
389 u_char adc_source;
392 u_char gain;
395 u_char attenuation;
398 u_char unused1;
399 u_char status;
402 u_char unused2, unused3, unused4, unused5;
403 u_char gpio_directions;
406 u_char unused6;
407 u_char gpio_data;
446 u_char cha_a_ctrl;
447 u_char char_dummy1;
448 u_char cha_a_data;
449 u_char char_dummy2;
450 u_char cha_b_ctrl;
451 u_char char_dummy3;
452 u_char cha_b_data;
483 u_char icr;
492 u_char cvr;
496 u_char isr;
505 u_char ivr;
508 u_char b[4];
522 u_char par_dt_reg;
523 u_char char_dummy1;
524 u_char active_edge;
525 u_char char_dummy2;
526 u_char data_dir;
527 u_char char_dummy3;
528 u_char int_en_a;
529 u_char char_dummy4;
530 u_char int_en_b;
531 u_char char_dummy5;
532 u_char int_pn_a;
533 u_char char_dummy6;
534 u_char int_pn_b;
535 u_char char_dummy7;
536 u_char int_sv_a;
537 u_char char_dummy8;
538 u_char int_sv_b;
539 u_char char_dummy9;
540 u_char int_mk_a;
541 u_char char_dummy10;
542 u_char int_mk_b;
543 u_char char_dummy11;
544 u_char vec_adr;
545 u_char char_dummy12;
546 u_char tim_ct_a;
547 u_char char_dummy13;
548 u_char tim_ct_b;
549 u_char char_dummy14;
550 u_char tim_ct_cd;
551 u_char char_dummy15;
552 u_char tim_dt_a;
553 u_char char_dummy16;
554 u_char tim_dt_b;
555 u_char char_dummy17;
556 u_char tim_dt_c;
557 u_char char_dummy18;
558 u_char tim_dt_d;
559 u_char char_dummy19;
560 u_char sync_char;
561 u_char char_dummy20;
562 u_char usart_ctr;
563 u_char char_dummy21;
564 u_char rcv_stat;
565 u_char char_dummy22;
566 u_char trn_stat;
567 u_char char_dummy23;
568 u_char usart_dta;
582 u_char sys_mask;
583 u_char char_dummy1;
584 u_char sys_stat;
585 u_char char_dummy2;
586 u_char softint;
587 u_char char_dummy3;
588 u_char vmeint;
589 u_char char_dummy4;
590 u_char gp_reg1;
591 u_char char_dummy5;
592 u_char gp_reg2;
593 u_char char_dummy6;
594 u_char vme_mask;
595 u_char char_dummy7;
596 u_char vme_stat;
604 u_char regsel;
605 u_char dummy;
606 u_char data;
655 u_char key_ctrl;
656 u_char char_dummy1;
657 u_char key_data;
658 u_char char_dummy2;
659 u_char mid_ctrl;
660 u_char char_dummy3;
661 u_char mid_data;
667 u_char int_ctrl; /* Falcon: Interrupt control */
668 u_char ctrl;
669 u_char pad2;
670 u_char bas_hi;
671 u_char pad3;
672 u_char bas_mid;
673 u_char pad4;
674 u_char bas_low;
675 u_char pad5;
676 u_char addr_hi;
677 u_char pad6;
678 u_char addr_mid;
679 u_char pad7;
680 u_char addr_low;
681 u_char pad8;
682 u_char end_hi;
683 u_char pad9;
684 u_char end_mid;
685 u_char pad10;
686 u_char end_low;
687 u_char pad11[12];
688 u_char track_select; /* Falcon */
689 u_char mode;
690 u_char pad12[14];
694 u_char ext_div;
695 u_char int_div;
696 u_char rec_track_select;
697 u_char dac_src;
698 u_char adc_src;
699 u_char input_gain;
773 u_char sec_ones;
774 u_char dummy1;
775 u_char sec_tens;
776 u_char dummy2;
777 u_char min_ones;
778 u_char dummy3;
779 u_char min_tens;
780 u_char dummy4;
781 u_char hr_ones;
782 u_char dummy5;
783 u_char hr_tens;
784 u_char dummy6;
785 u_char weekday;
786 u_char dummy7;
787 u_char day_ones;
788 u_char dummy8;
789 u_char day_tens;
790 u_char dummy9;
791 u_char mon_ones;
792 u_char dummy10;
793 u_char mon_tens;
794 u_char dummy11;
795 u_char year_ones;
796 u_char dummy12;
797 u_char year_tens;
798 u_char dummy13;
799 u_char mode;
800 u_char dummy14;
801 u_char test;
802 u_char dummy15;
803 u_char reset;