Lines Matching refs:l
117 movea.l #RAMEND, %sp /* set up stack at the end of DRAM:*/
121 moveq.l #0x07, %d1 /* Setup MBAR */
124 lea.l MCU_SIM_MBAR_ADRS, %a0
125 move.l #_dprbase, %d0
126 andi.l #MCU_SIM_MBAR_BA_MASK, %d0
127 ori.l #MCU_SIM_MBAR_AS_MASK, %d0
128 moves.l %d0, %a0@
130 moveq.l #0x05, %d1
131 movec.l %d1, %dfc
137 move.l #MCU_SIM_MCR, MCR
166 movea.l #_dprbase, %a0
167 movea.l #_dprbase+0x2000, %a1
177 move.l #MCU_SIM_GMR, %d0
178 move.l %d0, GMR
181 move.l #0x00400000, %d0
182 subq.l #0x01, %d0
183 eori.l #SIM_OR_MASK, %d0
184 ori.l #SIM_OR0_MASK, %d0
185 move.l %d0, OR0
187 move.l #__rom_start, %d0
188 ori.l #SIM_BR0_MASK, %d0
189 move.l %d0, BR0
191 move.l #0x0, BR1
192 move.l #0x0, BR2
193 move.l #0x0, BR3
194 move.l #0x0, BR4
195 move.l #0x0, BR5
196 move.l #0x0, BR6
197 move.l #0x0, BR7
202 move.l #_romvec, %a0
203 move.l #_ramvec, %a1
205 move.l %a0@, %d0
206 move.l %d0, %a1@
207 move.l %a0@, %a1@
208 addq.l #0x04, %a0
209 addq.l #0x04, %a1
210 cmp.l #_start, %a0
213 move.l #_ramvec, %a1
224 move.l %a0@, %d0
225 addq.l #0x04, %a0
226 move.l %d0, %a1@
227 addq.l #0x04, %a1
228 cmp.l #_edata, %a1
241 move.l #_dprbase, _quicc_base
245 move.l #_sdata, _rambase
246 move.l #__bss_stop, _ramstart
247 move.l #RAMEND, %d0
248 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
249 move.l %d0, _ramend /* Different from RAMEND.*/