Lines Matching refs:d0
125 move.l #_dprbase, %d0
126 andi.l #MCU_SIM_MBAR_BA_MASK, %d0
127 ori.l #MCU_SIM_MBAR_AS_MASK, %d0
128 moves.l %d0, %a0@
154 move.w #16384, %d0
156 subi.w #1, %d0
177 move.l #MCU_SIM_GMR, %d0
178 move.l %d0, GMR
181 move.l #0x00400000, %d0
182 subq.l #0x01, %d0
183 eori.l #SIM_OR_MASK, %d0
184 ori.l #SIM_OR0_MASK, %d0
185 move.l %d0, OR0
187 move.l #__rom_start, %d0
188 ori.l #SIM_BR0_MASK, %d0
189 move.l %d0, BR0
205 move.l %a0@, %d0
206 move.l %d0, %a1@
224 move.l %a0@, %d0
226 move.l %d0, %a1@
247 move.l #RAMEND, %d0
248 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
249 move.l %d0, _ramend /* Different from RAMEND.*/