Lines Matching refs:l
106 movea.l #RAMEND, %sp /*set up stack at the end of DRAM:*/
109 moveq.l #0x07, %d1 /* Setup MBAR */
112 lea.l MCU_SIM_MBAR_ADRS, %a0
113 move.l #_dprbase, %d0
114 andi.l #MCU_SIM_MBAR_BA_MASK, %d0
115 ori.l #MCU_SIM_MBAR_AS_MASK, %d0
116 moves.l %d0, %a0@
118 moveq.l #0x05, %d1
119 movec.l %d1, %dfc
125 move.l #MCU_SIM_MCR, MCR
151 movea.l #_dprbase, %a0
152 movea.l #_dprbase+0x2000, %a1
162 move.l #MCU_SIM_GMR, %d0
163 move.l %d0, GMR
166 move.l #RAMEND, %d0
167 subi.l #__ramstart, %d0
168 subq.l #0x01, %d0
169 eori.l #SIM_OR_MASK, %d0
170 ori.l #SIM_OR0_MASK, %d0
171 move.l %d0, OR0
173 move.l #__ramstart, %d0
174 ori.l #SIM_BR0_MASK, %d0
175 move.l %d0, BR0
178 move.l #ROMEND, %d0
179 subi.l #__rom_start, %d0
180 subq.l #0x01, %d0
181 eori.l #SIM_OR_MASK, %d0
182 ori.l #SIM_OR1_MASK, %d0
183 move.l %d0, OR1
185 move.l #__rom_start, %d0
186 ori.l #SIM_BR1_MASK, %d0
187 move.l %d0, BR1
192 move.l #_romvec, %a0
193 move.l #_ramvec, %a1
195 move.l %a0@, %d0
196 move.l %d0, %a1@
197 move.l %a0@, %a1@
198 addq.l #0x04, %a0
199 addq.l #0x04, %a1
200 cmp.l #_start, %a0
203 move.l #_ramvec, %a1
214 move.l %a0@, %d0
215 addq.l #0x04, %a0
216 move.l %d0, %a1@
217 addq.l #0x04, %a1
218 cmp.l #_edata, %a1
231 move.l #_dprbase, _quicc_base
235 move.l #_sdata, _rambase
236 move.l #__bss_stop, _ramstart
237 move.l #RAMEND, %d0
238 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
239 move.l %d0, _ramend /* Different from RAMEND.*/