Lines Matching refs:r2
62 GET_THIS_PADDR(r2, ia64_cpu_info) // load phys addr of cpu_info into r2
64 addl r17=O(PTCE_STRIDE),r2
65 addl r2=O(PTCE_BASE),r2
67 ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base
68 ld4 r19=[r2],4 // r19=ptce_count[0]
71 ld4 r20=[r2] // r20=ptce_count[1]
110 GET_THIS_PADDR(r2, ia64_mca_pal_base)
112 ld8 r16=[r2]
142 LOAD_PHYSICAL(p0,r2,1f) // return address
147 GET_IA64_MCA_DATA(r2)
150 add r3=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_SOS_OFFSET+SOS(PROC_STATE_PARAM), r2
189 GET_THIS_PADDR(r2, ia64_mca_pal_pte)
191 ld8 r18=[r2] // load PAL PTE
193 GET_THIS_PADDR(r2, ia64_mca_pal_base)
195 ld8 r16=[r2] // load PAL vaddr
223 GET_THIS_PADDR(r2, ia64_mca_tr_reload)
228 st8 [r2] =r18
235 LOAD_PHYSICAL(p0,r2,1f) // return address
241 LOAD_PHYSICAL(p0,r2,1f) // return address
246 GET_IA64_MCA_DATA(r2)
248 mov r7=r2
251 VIRTUAL_MODE_ENTER(r2, r3, ia64_os_mca_virtual_begin, r4)
263 mov r2=r7 // see GET_IA64_MCA_DATA above
269 DATA_PA_TO_VA(r2,r7)
271 add out0=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_PT_REGS_OFFSET, r2
272 add out1=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_SWITCH_STACK_OFFSET, r2
273 add out2=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_SOS_OFFSET, r2
277 PHYSICAL_MODE_ENTER(r2, r3, ia64_os_mca_virtual_end, r4)
285 LOAD_PHYSICAL(p0,r2,1f) // return address
290 LOAD_PHYSICAL(p0,r2,1f) // return address
338 LOAD_PHYSICAL(p0,r2,1f) // return address
344 LOAD_PHYSICAL(p0,r2,1f) // return address
350 LOAD_PHYSICAL(p0,r2,1f) // return address
355 GET_IA64_MCA_DATA(r2)
357 mov r7=r2
360 VIRTUAL_MODE_ENTER(r2, r3, ia64_os_init_virtual_begin, r4)
372 mov r2=r7 // see GET_IA64_MCA_DATA above
378 DATA_PA_TO_VA(r2,r7)
380 add out0=IA64_MCA_CPU_INIT_STACK_OFFSET+MCA_PT_REGS_OFFSET, r2
381 add out1=IA64_MCA_CPU_INIT_STACK_OFFSET+MCA_SWITCH_STACK_OFFSET, r2
382 add out2=IA64_MCA_CPU_INIT_STACK_OFFSET+MCA_SOS_OFFSET, r2
386 PHYSICAL_MODE_ENTER(r2, r3, ia64_os_init_virtual_end, r4)
392 LOAD_PHYSICAL(p0,r2,1f) // return address
399 LOAD_PHYSICAL(p0,r2,1f) // return address
411 #define temp1 r2 /* careful, it overlaps with input registers */
458 mov b0=r2 // save return address
626 add r2=32*2,r17
635 fc r2
643 add r2=32*8,r2
652 fc r2
660 add r2=32*8,r2
669 fc r2
677 add r2=32*8,r2
686 fc r2
719 mov b0=r2 // save return address
918 mov b0=r2 // save return address
971 mov b0=r2 // save return address
1021 mov b0=r2 // save return address