424 #define __ia64_set_dbr(index, val)						\  argument
425 	asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")
427 #define ia64_set_ibr(index, val)						\  argument
428 	asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")
430 #define ia64_set_pkr(index, val)						\  argument
431 	asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")
433 #define ia64_set_pmc(index, val)						\  argument
434 	asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")
436 #define ia64_set_pmd(index, val)						\  argument
437 	asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
439 #define ia64_native_set_rr(index, val)							\  argument
440 	asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
442 #define ia64_native_get_cpuid(index)							\  argument
445 	asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index));	\
449 #define __ia64_get_dbr(index)							\  argument
452 	asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
456 #define ia64_get_ibr(index)							\  argument
459 	asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
463 #define ia64_get_pkr(index)							\  argument
466 	asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
470 #define ia64_get_pmc(index)							\  argument
473 	asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
478 #define ia64_native_get_pmd(index)						\  argument
481 	asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
485 #define ia64_native_get_rr(index)						\  argument
488 	asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index));	\