Lines Matching refs:gr3
87 movsg hsr0, gr3
89 or gr3,gr4,gr3
90 movgs gr3,hsr0
91 or gr3,gr8,gr7 // add the sleep bits for later
93 li #__icache_lock_start,gr3
95 1: icpl gr3,gr0,#1
96 addi gr3,#L1_CACHE_BYTES,gr3
97 cmp gr4,gr3,icc0
201 li 0x0100000,gr3
202 3: subicc gr3,#1,gr3,icc0
225 sethi.p %hi(HSR0_EXMMU),gr3
226 setlo %lo(HSR0_EXMMU),gr3
227 andcc gr3,gr4,gr0,icc0
231 sethi.p %hi(__page_offset),gr3
232 setlo %lo(__page_offset),gr3
233 sub gr11,gr3,gr11
279 li __icache_lock_start,gr3
281 1: icul gr3
282 addi gr3,#L1_CACHE_BYTES,gr3
283 cmp gr4,gr3,icc0
303 li #__core_sleep_icache_lock_start,gr3
306 1: icpl gr3,gr0,#1
307 addi gr3,#L1_CACHE_BYTES,gr3
308 cmp gr4,gr3,icc0
364 li __core_sleep_icache_lock_start,gr3
366 1: icul gr3
367 addi gr3,#L1_CACHE_BYTES,gr3
368 cmp gr4,gr3,icc0