Lines Matching refs:timer_base
173 static void __iomem *timer_base; variable
182 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); in crisv32_clkevt_switch_state()
194 REG_WR(timer, timer_base, rw_tmr0_div, evt); in crisv32_clkevt_next_event()
195 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); in crisv32_clkevt_next_event()
198 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); in crisv32_clkevt_next_event()
213 intr = REG_RD(timer, timer_base, r_masked_intr); in crisv32_timer_interrupt()
217 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); in crisv32_timer_interrupt()
218 REG_WR(timer, timer_base, rw_ack_intr, ack); in crisv32_timer_interrupt()
250 return REG_RD(timer, timer_base, r_time); in crisv32_timer_sched_clock()
261 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); in crisv32_timer_init()
263 timer_intr_mask = REG_RD(timer, timer_base, rw_intr_mask); in crisv32_timer_init()
265 REG_WR(timer, timer_base, rw_intr_mask, timer_intr_mask); in crisv32_timer_init()
282 timer_base = (void __iomem *) regi_timer0; in time_init()
289 clocksource_mmio_init(timer_base + REG_RD_ADDR_timer_r_time, in time_init()