151 		reg_clkgen_rw_clk_ctrl ctrl =  in handle_watchdog_bite()  local
153 		ctrl.pll = 0;  in handle_watchdog_bite()
154 		REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, ctrl);  in handle_watchdog_bite()
177 	reg_timer_rw_tmr0_ctrl ctrl = {  in crisv32_clkevt_switch_state()  local
182 	REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl);  in crisv32_clkevt_switch_state()
189 	reg_timer_rw_tmr0_ctrl ctrl = {  in crisv32_clkevt_next_event()  local
195 	REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl);  in crisv32_clkevt_next_event()
197 	ctrl.op = regk_timer_run;  in crisv32_clkevt_next_event()
198 	REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl);  in crisv32_clkevt_next_event()
206 	reg_timer_rw_tmr0_ctrl ctrl = {  in crisv32_timer_interrupt()  local
217 	REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl);  in crisv32_timer_interrupt()
256 	reg_timer_rw_tmr0_ctrl ctrl = {  in crisv32_timer_init()  local
261 	REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl);  in crisv32_timer_init()