Lines Matching refs:move
148 move.d $pc,$r0
166 move.d START_ETHERNET_CLOCK, $r0
167 move.d $r0, [R_NETWORK_GEN_CONFIG]
171 move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
172 move.d $r0, [R_WAITSTATES]
174 move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
175 move.d $r0, [R_BUS_CONFIG]
199 move.d text_start, $r1 ; destination
200 move.d __vmlinux_end, $r2 ; end destination
201 move.d $r2, $r4
203 1: move.w [$r0+], $r3
204 move.w $r3, [$r1+]
279 move.d __init_end, $r0; the image will be after the end of init
280 move.d [$r0], $r1 ; cramfs assumes same endian on host/target
287 move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb)
291 move.d _end, $r1
295 move.d $r1, [romfs_start] ; new romfs location
296 move.d $r2, [romfs_length]
307 1: move.w [$r0=$r0-2],$r3
308 move.w $r3,[$r1=$r1-2]
317 move.d $r0, [romfs_in_flash]
328 move.d 256, $r13
329 move.d cris_command_line, $r10
332 move.b [$r11+], $r12
333 move.b $r12, [$r10+]
343 move.d init_thread_union + 8192, $sp
344 move.d ibr_start,$r0 ; this symbol is set by the linker script
345 move $r0,$ibr
346 move.d $r0,[etrax_irv] ; set the interrupt base register and pointer
350 move.d __bss_start, $r0
351 move.d _end, $r1
393 move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG
395 move.d $r0,[R_GEN_CONFIG]
399 move.b $r0,[R_DMA_CH6_CMD] ; reset (ser0 dma out)
400 move.b $r0,[R_DMA_CH7_CMD] ; reset (ser0 dma in)
401 1: move.b [R_DMA_CH6_CMD],$r0 ; wait for reset cycle to finish
406 1: move.b [R_DMA_CH7_CMD],$r0 ; wait for reset cycle to finish
414 move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out)
415 move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in)
416 1: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish
421 1: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish
430 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0
431 move.b $r0,[port_pa_dir_shadow]
432 move.b $r0,[R_PORT_PA_DIR]
433 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0
434 move.b $r0,[port_pa_data_shadow]
435 move.b $r0,[R_PORT_PA_DATA]
437 move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0
438 move.b $r0,[port_pb_config_shadow]
439 move.b $r0,[R_PORT_PB_CONFIG]
440 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0
441 move.b $r0,[port_pb_dir_shadow]
442 move.b $r0,[R_PORT_PB_DIR]
443 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0
444 move.b $r0,[port_pb_data_shadow]
445 move.b $r0,[R_PORT_PB_DATA]
448 move.d $r0,[port_pb_i2c_shadow]
449 move.d $r0, [R_PORT_PB_I2C]
452 move.d $r0,[port_g_data_shadow]
453 move.d $r0,[R_PORT_G_DATA]
460 move.d $r0,[R_SERIAL0_XOFF]
463 move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \
465 move.b $r0,[R_SERIAL0_BAUD]
468 move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \
476 move.b $r0,[R_SERIAL0_REC_CTRL]
479 move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \
487 move.b $r0,[R_SERIAL0_TR_CTRL]
494 move.d $r0,[R_SERIAL1_XOFF]
497 move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \
499 move.b $r0,[R_SERIAL1_BAUD]
502 move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \
510 move.b $r0,[R_SERIAL1_REC_CTRL]
513 move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \
521 move.b $r0,[R_SERIAL1_TR_CTRL]
529 move.d $r0,[R_SERIAL2_XOFF]
532 move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \
534 move.b $r0,[R_SERIAL2_BAUD]
537 move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \
545 move.b $r0,[R_SERIAL2_REC_CTRL]
548 move.b IO_FIELD (R_SERIAL2_TR_CTRL, txd, 0) \
556 move.b $r0,[R_SERIAL2_TR_CTRL]
565 move.d $r0,[R_SERIAL3_XOFF]
568 move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \
570 move.b $r0,[R_SERIAL3_BAUD]
573 move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \
581 move.b $r0,[R_SERIAL3_REC_CTRL]
584 move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \
592 move.b $r0,[R_SERIAL3_TR_CTRL]