Lines Matching refs:W
21 R1 = W[P0](z);
23 W[P0] = R1.L;
79 W[P3] = R4.L;
108 R6 = W[P0](z);
110 W[P0] = R0.l; /* Set Max VCO to SCLK divider */
114 R5 = W[P0](z);
116 W[P0] = R0.l; /* Set Min CLKIN to VCO multiplier */
125 R7 = W[P0](z);
132 W[P0] = R2; /* Set Min Core Voltage */
146 R0 = W[P0](z);
148 W[P0] = R0.L; /* Turn CCLK OFF */
162 W[P0]= R7;
173 W[P0]= R6; /* Restore CCLK and SCLK divider */
280 R0 = W[P0] (Z);