Lines Matching refs:bfin_write32

17 #define bfin_write_CHIPID(val)		bfin_write32(CHIPID, val)
23 #define bfin_write_SEC0_CCTL(val)	bfin_write32(SEC0_CCTL, val)
25 #define bfin_write_SEC0_CSID(val)	bfin_write32(SEC0_CSID, val)
27 #define bfin_write_SEC_GCTL(val)	bfin_write32(SEC_GCTL, val)
30 #define bfin_write_SEC_FCTL(val)	bfin_write32(SEC_FCTL, val)
33 #define bfin_write_SEC_SCTL(sid, val)	bfin_write32((SEC_SCTL0 + (sid) * 8), val)
36 #define bfin_write_SEC_SSTAT(sid, val)	bfin_write32((SEC_SSTAT0 + (sid) * 8), val)
40 #define bfin_write_RCU0_CTL(val)	bfin_write32(RCU0_CTL, val)
46 #define bfin_write_WDOG_CNT(val)	bfin_write32(WDOG_CNT, val)
48 #define bfin_write_WDOG_STAT(val)	bfin_write32(WDOG_STAT, val)
55 #define bfin_write_UART0_REVID(val)	bfin_write32(UART0_REVID, val)
57 #define bfin_write_UART0_GCTL(val)	bfin_write32(UART0_GCTL, val)
59 #define bfin_write_UART0_STAT(val)	bfin_write32(UART0_STAT, val)
61 #define bfin_write_UART0_SCR(val)	bfin_write32(UART0_SCR, val)
63 #define bfin_write_UART0_CLK(val)	bfin_write32(UART0_CLK, val)
65 #define bfin_write_UART0_IER(val)	bfin_write32(UART0_IER, val)
67 #define bfin_write_UART0_IER_SET(val)	bfin_write32(UART0_IER_SET, val)
69 #define bfin_write_UART0_IER_CLEAR(val)	bfin_write32(UART0_IER_CLEAR, val)
71 #define bfin_write_UART0_RBR(val)	bfin_write32(UART0_RBR, val)
73 #define bfin_write_UART0_THR(val)	bfin_write32(UART0_THR, val)
75 #define bfin_write_UART0_TAIP(val)	bfin_write32(UART0_TAIP, val)
77 #define bfin_write_UART0_TSR(val)	bfin_write32(UART0_TSR, val)
79 #define bfin_write_UART0_RSR(val)	bfin_write32(UART0_RSR, val)
81 #define bfin_write_UART0_TXCNT(val)	bfin_write32(UART0_TXCNT, val)
83 #define bfin_write_UART0_RXCNT(val)	bfin_write32(UART0_RXCNT, val)
88 #define bfin_write_UART1_REVID(val)	bfin_write32(UART1_REVID, val)
90 #define bfin_write_UART1_GCTL(val)	bfin_write32(UART1_GCTL, val)
92 #define bfin_write_UART1_STAT(val)	bfin_write32(UART1_STAT, val)
94 #define bfin_write_UART1_SCR(val)	bfin_write32(UART1_SCR, val)
96 #define bfin_write_UART1_CLK(val)	bfin_write32(UART1_CLK, val)
98 #define bfin_write_UART1_IER(val)	bfin_write32(UART1_IER, val)
100 #define bfin_write_UART1_IER_SET(val)	bfin_write32(UART1_IER_SET, val)
102 #define bfin_write_UART1_IER_CLEAR(val)	bfin_write32(UART1_IER_CLEAR, val)
104 #define bfin_write_UART1_RBR(val)	bfin_write32(UART1_RBR, val)
106 #define bfin_write_UART1_THR(val)	bfin_write32(UART1_THR, val)
108 #define bfin_write_UART1_TAIP(val)	bfin_write32(UART1_TAIP, val)
110 #define bfin_write_UART1_TSR(val)	bfin_write32(UART1_TSR, val)
112 #define bfin_write_UART1_RSR(val)	bfin_write32(UART1_RSR, val)
114 #define bfin_write_UART1_TXCNT(val)	bfin_write32(UART1_TXCNT, val)
116 #define bfin_write_UART1_RXCNT(val)	bfin_write32(UART1_RXCNT, val)
122 #define bfin_write_SPI0_CTL(val)	bfin_write32(SPI0_CTL, val)
124 #define bfin_write_SPI0_RXCTL(val)	bfin_write32(SPI0_RXCTL, val)
126 #define bfin_write_SPI0_TXCTL(val)	bfin_write32(SPI0_TXCTL, val)
128 #define bfin_write_SPI0_CLK(val)	bfin_write32(SPI0_CLK, val)
130 #define bfin_write_SPI0_DLY(val)	bfin_write32(SPI0_DLY, val)
132 #define bfin_write_SPI0_SLVSEL(val)	bfin_write32(SPI0_SLVSEL, val)
134 #define bfin_write_SPI0_RWC(val)	bfin_write32(SPI0_RWC, val)
136 #define bfin_write_SPI0_RWCR(val)	bfin_write32(SPI0_RWCR, val)
138 #define bfin_write_SPI0_TWC(val)	bfin_write32(SPI0_TWC, val)
140 #define bfin_write_SPI0_TWCR(val)	bfin_write32(SPI0_TWCR, val)
142 #define bfin_write_SPI0_IMSK(val)	bfin_write32(SPI0_IMSK, val)
144 #define bfin_write_SPI0_IMSK_CLR(val)	bfin_write32(SPI0_IMSK_CLR, val)
146 #define bfin_write_SPI0_IMSK_SET(val)	bfin_write32(SPI0_IMSK_SET, val)
148 #define bfin_write_SPI0_STAT(val)	bfin_write32(SPI0_STAT, val)
150 #define bfin_write_SPI0_ILAT(val)	bfin_write32(SPI0_ILAT, val)
152 #define bfin_write_SPI0_ILAT_CLR(val)	bfin_write32(SPI0_ILAT_CLR, val)
154 #define bfin_write_SPI0_RFIFO(val)	bfin_write32(SPI0_RFIFO, val)
156 #define bfin_write_SPI0_TFIFO(val)	bfin_write32(SPI0_TFIFO, val)
161 #define bfin_write_SPI1_CTL(val)	bfin_write32(SPI1_CTL, val)
163 #define bfin_write_SPI1_RXCTL(val)	bfin_write32(SPI1_RXCTL, val)
165 #define bfin_write_SPI1_TXCTL(val)	bfin_write32(SPI1_TXCTL, val)
167 #define bfin_write_SPI1_CLK(val)	bfin_write32(SPI1_CLK, val)
169 #define bfin_write_SPI1_DLY(val)	bfin_write32(SPI1_DLY, val)
171 #define bfin_write_SPI1_SLVSEL(val)	bfin_write32(SPI1_SLVSEL, val)
173 #define bfin_write_SPI1_RWC(val)	bfin_write32(SPI1_RWC, val)
175 #define bfin_write_SPI1_RWCR(val)	bfin_write32(SPI1_RWCR, val)
177 #define bfin_write_SPI1_TWC(val)	bfin_write32(SPI1_TWC, val)
179 #define bfin_write_SPI1_TWCR(val)	bfin_write32(SPI1_TWCR, val)
181 #define bfin_write_SPI1_IMSK(val)	bfin_write32(SPI1_IMSK, val)
183 #define bfin_write_SPI1_IMSK_CLR(val)	bfin_write32(SPI1_IMSK_CLR, val)
185 #define bfin_write_SPI1_IMSK_SET(val)	bfin_write32(SPI1_IMSK_SET, val)
187 #define bfin_write_SPI1_STAT(val)	bfin_write32(SPI1_STAT, val)
189 #define bfin_write_SPI1_ILAT(val)	bfin_write32(SPI1_ILAT, val)
191 #define bfin_write_SPI1_ILAT_CLR(val)	bfin_write32(SPI1_ILAT_CLR, val)
193 #define bfin_write_SPI1_RFIFO(val)	bfin_write32(SPI1_RFIFO, val)
195 #define bfin_write_SPI1_TFIFO(val)	bfin_write32(SPI1_TFIFO, val)
201 #define bfin_write_TIMER0_COUNTER(val)       bfin_write32(TIMER0_COUNTER, val)
203 #define bfin_write_TIMER0_PERIOD(val)        bfin_write32(TIMER0_PERIOD, val)
205 #define bfin_write_TIMER0_WIDTH(val)         bfin_write32(TIMER0_WIDTH, val)
209 #define bfin_write_TIMER1_COUNTER(val)       bfin_write32(TIMER1_COUNTER, val)
211 #define bfin_write_TIMER1_PERIOD(val)        bfin_write32(TIMER1_PERIOD, val)
213 #define bfin_write_TIMER1_WIDTH(val)         bfin_write32(TIMER1_WIDTH, val)
217 #define bfin_write_TIMER2_COUNTER(val)       bfin_write32(TIMER2_COUNTER, val)
219 #define bfin_write_TIMER2_PERIOD(val)        bfin_write32(TIMER2_PERIOD, val)
221 #define bfin_write_TIMER2_WIDTH(val)         bfin_write32(TIMER2_WIDTH, val)
225 #define bfin_write_TIMER3_COUNTER(val)       bfin_write32(TIMER3_COUNTER, val)
227 #define bfin_write_TIMER3_PERIOD(val)        bfin_write32(TIMER3_PERIOD, val)
229 #define bfin_write_TIMER3_WIDTH(val)         bfin_write32(TIMER3_WIDTH, val)
233 #define bfin_write_TIMER4_COUNTER(val)       bfin_write32(TIMER4_COUNTER, val)
235 #define bfin_write_TIMER4_PERIOD(val)        bfin_write32(TIMER4_PERIOD, val)
237 #define bfin_write_TIMER4_WIDTH(val)         bfin_write32(TIMER4_WIDTH, val)
241 #define bfin_write_TIMER5_COUNTER(val)       bfin_write32(TIMER5_COUNTER, val)
243 #define bfin_write_TIMER5_PERIOD(val)        bfin_write32(TIMER5_PERIOD, val)
245 #define bfin_write_TIMER5_WIDTH(val)         bfin_write32(TIMER5_WIDTH, val)
249 #define bfin_write_TIMER6_COUNTER(val)       bfin_write32(TIMER6_COUNTER, val)
251 #define bfin_write_TIMER6_PERIOD(val)        bfin_write32(TIMER6_PERIOD, val)
253 #define bfin_write_TIMER6_WIDTH(val)         bfin_write32(TIMER6_WIDTH, val)
257 #define bfin_write_TIMER7_COUNTER(val)       bfin_write32(TIMER7_COUNTER, val)
259 #define bfin_write_TIMER7_PERIOD(val)        bfin_write32(TIMER7_PERIOD, val)
261 #define bfin_write_TIMER7_WIDTH(val)         bfin_write32(TIMER7_WIDTH, val)
273 #define bfin_write_SMC_GCTL(val) bfin_write32(SMC_GCTL, val)
276 #define bfin_write_SMC_B0CTL(val) bfin_write32(SMC_B0CTL, val)
278 #define bfin_write_SMC_B0TIM(val) bfin_write32(SMC_B0TIM, val)
280 #define bfin_write_SMC_B0ETIM(val) bfin_write32(SMC_B0ETIM, val)
282 #define bfin_write_SMC_B1CTL(val) bfin_write32(SMC_B1CTL, val)
284 #define bfin_write_SMC_B1TIM(val) bfin_write32(SMC_B1TIM, val)
286 #define bfin_write_SMC_B1ETIM(val) bfin_write32(SMC_B1ETIM, val)
288 #define bfin_write_SMC_B2CTL(val) bfin_write32(SMC_B2CTL, val)
290 #define bfin_write_SMC_B2TIM(val) bfin_write32(SMC_B2TIM, val)
292 #define bfin_write_SMC_B2ETIM(val) bfin_write32(SMC_B2ETIM, val)
294 #define bfin_write_SMC_B3CTL(val) bfin_write32(SMC_B3CTL, val)
296 #define bfin_write_SMC_B3TIM(val) bfin_write32(SMC_B3TIM, val)
298 #define bfin_write_SMC_B3ETIM(val) bfin_write32(SMC_B3ETIM, val)
302 #define bfin_write_DMC0_CFG(val) bfin_write32(DMC0_CFG, val)
304 #define bfin_write_DMC0_TR0(val) bfin_write32(DMC0_TR0, val)
306 #define bfin_write_DMC0_TR1(val) bfin_write32(DMC0_TR1, val)
308 #define bfin_write_DMC0_TR2(val) bfin_write32(DMC0_TR2, val)
310 #define bfin_write_DMC0_MR(val) bfin_write32(DMC0_MR, val)
312 #define bfin_write_DMC0_EMR1(val) bfin_write32(DMC0_EMR1, val)
314 #define bfin_write_DMC0_CTL(val) bfin_write32(DMC0_CTL, val)
316 #define bfin_write_DMC0_EFFCTL(val) bfin_write32(DMC0_EFFCTL, val)
318 #define bfin_write_DMC0_STAT(val) bfin_write32(DMC0_STAT, val)
320 #define bfin_write_DMC0_DLLCTL(val) bfin_write32(DMC0_DLLCTL, val)
328 #define bfin_write_DMA0_NEXT_DESC_PTR(val) 	bfin_write32(DMA0_NEXT_DESC_PTR, val)
330 #define bfin_write_DMA0_START_ADDR(val) 	bfin_write32(DMA0_START_ADDR, val)
332 #define bfin_write_DMA0_CONFIG(val)		bfin_write32(DMA0_CONFIG, val)
334 #define bfin_write_DMA0_X_COUNT(val)		bfin_write32(DMA0_X_COUNT, val)
336 #define bfin_write_DMA0_X_MODIFY(val) 		bfin_write32(DMA0_X_MODIFY, val)
338 #define bfin_write_DMA0_Y_COUNT(val)		bfin_write32(DMA0_Y_COUNT, val)
340 #define bfin_write_DMA0_Y_MODIFY(val) 		bfin_write32(DMA0_Y_MODIFY, val)
342 #define bfin_write_DMA0_CURR_DESC_PTR(val) 	bfin_write32(DMA0_CURR_DESC_PTR, val)
344 #define bfin_write_DMA0_PREV_DESC_PTR(val) 	bfin_write32(DMA0_PREV_DESC_PTR, val)
346 #define bfin_write_DMA0_CURR_ADDR(val) 		bfin_write32(DMA0_CURR_ADDR, val)
348 #define bfin_write_DMA0_IRQ_STATUS(val)		bfin_write32(DMA0_IRQ_STATUS, val)
350 #define bfin_write_DMA0_CURR_X_COUNT(val)	bfin_write32(DMA0_CURR_X_COUNT, val)
352 #define bfin_write_DMA0_CURR_Y_COUNT(val)	bfin_write32(DMA0_CURR_Y_COUNT, val)
354 #define bfin_write_DMA0_BWL_COUNT(val)		bfin_write32(DMA0_BWL_COUNT, val)
356 #define bfin_write_DMA0_CURR_BWL_COUNT(val)	bfin_write32(DMA0_CURR_BWL_COUNT, val)
358 #define bfin_write_DMA0_BWM_COUNT(val)		bfin_write32(DMA0_BWM_COUNT, val)
360 #define bfin_write_DMA0_CURR_BWM_COUNT(val)	bfin_write32(DMA0_CURR_BWM_COUNT, val)
365 #define bfin_write_DMA1_NEXT_DESC_PTR(val) 	bfin_write32(DMA1_NEXT_DESC_PTR, val)
367 #define bfin_write_DMA1_START_ADDR(val) 	bfin_write32(DMA1_START_ADDR, val)
369 #define bfin_write_DMA1_CONFIG(val)		bfin_write32(DMA1_CONFIG, val)
371 #define bfin_write_DMA1_X_COUNT(val)		bfin_write32(DMA1_X_COUNT, val)
373 #define bfin_write_DMA1_X_MODIFY(val) 		bfin_write32(DMA1_X_MODIFY, val)
375 #define bfin_write_DMA1_Y_COUNT(val)		bfin_write32(DMA1_Y_COUNT, val)
377 #define bfin_write_DMA1_Y_MODIFY(val) 		bfin_write32(DMA1_Y_MODIFY, val)
379 #define bfin_write_DMA1_CURR_DESC_PTR(val) 	bfin_write32(DMA1_CURR_DESC_PTR, val)
381 #define bfin_write_DMA1_PREV_DESC_PTR(val) 	bfin_write32(DMA1_PREV_DESC_PTR, val)
383 #define bfin_write_DMA1_CURR_ADDR(val) 		bfin_write32(DMA1_CURR_ADDR, val)
385 #define bfin_write_DMA1_IRQ_STATUS(val)		bfin_write32(DMA1_IRQ_STATUS, val)
387 #define bfin_write_DMA1_CURR_X_COUNT(val)	bfin_write32(DMA1_CURR_X_COUNT, val)
389 #define bfin_write_DMA1_CURR_Y_COUNT(val)	bfin_write32(DMA1_CURR_Y_COUNT, val)
391 #define bfin_write_DMA1_BWL_COUNT(val)		bfin_write32(DMA1_BWL_COUNT, val)
393 #define bfin_write_DMA1_CURR_BWL_COUNT(val)	bfin_write32(DMA1_CURR_BWL_COUNT, val)
395 #define bfin_write_DMA1_BWM_COUNT(val)		bfin_write32(DMA1_BWM_COUNT, val)
397 #define bfin_write_DMA1_CURR_BWM_COUNT(val)	bfin_write32(DMA1_CURR_BWM_COUNT, val)
402 #define bfin_write_DMA2_NEXT_DESC_PTR(val) 	bfin_write32(DMA2_NEXT_DESC_PTR, val)
404 #define bfin_write_DMA2_START_ADDR(val) 	bfin_write32(DMA2_START_ADDR, val)
406 #define bfin_write_DMA2_CONFIG(val)		bfin_write32(DMA2_CONFIG, val)
408 #define bfin_write_DMA2_X_COUNT(val)		bfin_write32(DMA2_X_COUNT, val)
410 #define bfin_write_DMA2_X_MODIFY(val) 		bfin_write32(DMA2_X_MODIFY, val)
412 #define bfin_write_DMA2_Y_COUNT(val)		bfin_write32(DMA2_Y_COUNT, val)
414 #define bfin_write_DMA2_Y_MODIFY(val) 		bfin_write32(DMA2_Y_MODIFY, val)
416 #define bfin_write_DMA2_CURR_DESC_PTR(val) 	bfin_write32(DMA2_CURR_DESC_PTR, val)
418 #define bfin_write_DMA2_PREV_DESC_PTR(val) 	bfin_write32(DMA2_PREV_DESC_PTR, val)
420 #define bfin_write_DMA2_CURR_ADDR(val) 		bfin_write32(DMA2_CURR_ADDR, val)
422 #define bfin_write_DMA2_IRQ_STATUS(val)		bfin_write32(DMA2_IRQ_STATUS, val)
424 #define bfin_write_DMA2_CURR_X_COUNT(val)	bfin_write32(DMA2_CURR_X_COUNT, val)
426 #define bfin_write_DMA2_CURR_Y_COUNT(val)	bfin_write32(DMA2_CURR_Y_COUNT, val)
428 #define bfin_write_DMA2_BWL_COUNT(val)		bfin_write32(DMA2_BWL_COUNT, val)
430 #define bfin_write_DMA2_CURR_BWL_COUNT(val)	bfin_write32(DMA2_CURR_BWL_COUNT, val)
432 #define bfin_write_DMA2_BWM_COUNT(val)		bfin_write32(DMA2_BWM_COUNT, val)
434 #define bfin_write_DMA2_CURR_BWM_COUNT(val)	bfin_write32(DMA2_CURR_BWM_COUNT, val)
439 #define bfin_write_DMA3_NEXT_DESC_PTR(val) 	bfin_write32(DMA3_NEXT_DESC_PTR, val)
441 #define bfin_write_DMA3_START_ADDR(val) 	bfin_write32(DMA3_START_ADDR, val)
443 #define bfin_write_DMA3_CONFIG(val)		bfin_write32(DMA3_CONFIG, val)
445 #define bfin_write_DMA3_X_COUNT(val)		bfin_write32(DMA3_X_COUNT, val)
447 #define bfin_write_DMA3_X_MODIFY(val) 		bfin_write32(DMA3_X_MODIFY, val)
449 #define bfin_write_DMA3_Y_COUNT(val)		bfin_write32(DMA3_Y_COUNT, val)
451 #define bfin_write_DMA3_Y_MODIFY(val) 		bfin_write32(DMA3_Y_MODIFY, val)
453 #define bfin_write_DMA3_CURR_DESC_PTR(val) 	bfin_write32(DMA3_CURR_DESC_PTR, val)
455 #define bfin_write_DMA3_PREV_DESC_PTR(val) 	bfin_write32(DMA3_PREV_DESC_PTR, val)
457 #define bfin_write_DMA3_CURR_ADDR(val) 		bfin_write32(DMA3_CURR_ADDR, val)
459 #define bfin_write_DMA3_IRQ_STATUS(val)		bfin_write32(DMA3_IRQ_STATUS, val)
461 #define bfin_write_DMA3_CURR_X_COUNT(val)	bfin_write32(DMA3_CURR_X_COUNT, val)
463 #define bfin_write_DMA3_CURR_Y_COUNT(val)	bfin_write32(DMA3_CURR_Y_COUNT, val)
465 #define bfin_write_DMA3_BWL_COUNT(val)		bfin_write32(DMA3_BWL_COUNT, val)
467 #define bfin_write_DMA3_CURR_BWL_COUNT(val)	bfin_write32(DMA3_CURR_BWL_COUNT, val)
469 #define bfin_write_DMA3_BWM_COUNT(val)		bfin_write32(DMA3_BWM_COUNT, val)
471 #define bfin_write_DMA3_CURR_BWM_COUNT(val)	bfin_write32(DMA3_CURR_BWM_COUNT, val)
476 #define bfin_write_DMA4_NEXT_DESC_PTR(val) 	bfin_write32(DMA4_NEXT_DESC_PTR, val)
478 #define bfin_write_DMA4_START_ADDR(val) 	bfin_write32(DMA4_START_ADDR, val)
480 #define bfin_write_DMA4_CONFIG(val)		bfin_write32(DMA4_CONFIG, val)
482 #define bfin_write_DMA4_X_COUNT(val)		bfin_write32(DMA4_X_COUNT, val)
484 #define bfin_write_DMA4_X_MODIFY(val) 		bfin_write32(DMA4_X_MODIFY, val)
486 #define bfin_write_DMA4_Y_COUNT(val)		bfin_write32(DMA4_Y_COUNT, val)
488 #define bfin_write_DMA4_Y_MODIFY(val) 		bfin_write32(DMA4_Y_MODIFY, val)
490 #define bfin_write_DMA4_CURR_DESC_PTR(val) 	bfin_write32(DMA4_CURR_DESC_PTR, val)
492 #define bfin_write_DMA4_PREV_DESC_PTR(val) 	bfin_write32(DMA4_PREV_DESC_PTR, val)
494 #define bfin_write_DMA4_CURR_ADDR(val) 		bfin_write32(DMA4_CURR_ADDR, val)
496 #define bfin_write_DMA4_IRQ_STATUS(val)		bfin_write32(DMA4_IRQ_STATUS, val)
498 #define bfin_write_DMA4_CURR_X_COUNT(val)	bfin_write32(DMA4_CURR_X_COUNT, val)
500 #define bfin_write_DMA4_CURR_Y_COUNT(val)	bfin_write32(DMA4_CURR_Y_COUNT, val)
502 #define bfin_write_DMA4_BWL_COUNT(val)		bfin_write32(DMA4_BWL_COUNT, val)
504 #define bfin_write_DMA4_CURR_BWL_COUNT(val)	bfin_write32(DMA4_CURR_BWL_COUNT, val)
506 #define bfin_write_DMA4_BWM_COUNT(val)		bfin_write32(DMA4_BWM_COUNT, val)
508 #define bfin_write_DMA4_CURR_BWM_COUNT(val)	bfin_write32(DMA4_CURR_BWM_COUNT, val)
513 #define bfin_write_DMA5_NEXT_DESC_PTR(val) 	bfin_write32(DMA5_NEXT_DESC_PTR, val)
515 #define bfin_write_DMA5_START_ADDR(val) 	bfin_write32(DMA5_START_ADDR, val)
517 #define bfin_write_DMA5_CONFIG(val)		bfin_write32(DMA5_CONFIG, val)
519 #define bfin_write_DMA5_X_COUNT(val)		bfin_write32(DMA5_X_COUNT, val)
521 #define bfin_write_DMA5_X_MODIFY(val) 		bfin_write32(DMA5_X_MODIFY, val)
523 #define bfin_write_DMA5_Y_COUNT(val)		bfin_write32(DMA5_Y_COUNT, val)
525 #define bfin_write_DMA5_Y_MODIFY(val) 		bfin_write32(DMA5_Y_MODIFY, val)
527 #define bfin_write_DMA5_CURR_DESC_PTR(val) 	bfin_write32(DMA5_CURR_DESC_PTR, val)
529 #define bfin_write_DMA5_PREV_DESC_PTR(val) 	bfin_write32(DMA5_PREV_DESC_PTR, val)
531 #define bfin_write_DMA5_CURR_ADDR(val) 		bfin_write32(DMA5_CURR_ADDR, val)
533 #define bfin_write_DMA5_IRQ_STATUS(val)		bfin_write32(DMA5_IRQ_STATUS, val)
535 #define bfin_write_DMA5_CURR_X_COUNT(val)	bfin_write32(DMA5_CURR_X_COUNT, val)
537 #define bfin_write_DMA5_CURR_Y_COUNT(val)	bfin_write32(DMA5_CURR_Y_COUNT, val)
539 #define bfin_write_DMA5_BWL_COUNT(val)		bfin_write32(DMA5_BWL_COUNT, val)
541 #define bfin_write_DMA5_CURR_BWL_COUNT(val)	bfin_write32(DMA5_CURR_BWL_COUNT, val)
543 #define bfin_write_DMA5_BWM_COUNT(val)		bfin_write32(DMA5_BWM_COUNT, val)
545 #define bfin_write_DMA5_CURR_BWM_COUNT(val)	bfin_write32(DMA5_CURR_BWM_COUNT, val)
550 #define bfin_write_DMA6_NEXT_DESC_PTR(val) 	bfin_write32(DMA6_NEXT_DESC_PTR, val)
552 #define bfin_write_DMA6_START_ADDR(val) 	bfin_write32(DMA6_START_ADDR, val)
554 #define bfin_write_DMA6_CONFIG(val)		bfin_write32(DMA6_CONFIG, val)
556 #define bfin_write_DMA6_X_COUNT(val)		bfin_write32(DMA6_X_COUNT, val)
558 #define bfin_write_DMA6_X_MODIFY(val) 		bfin_write32(DMA6_X_MODIFY, val)
560 #define bfin_write_DMA6_Y_COUNT(val)		bfin_write32(DMA6_Y_COUNT, val)
562 #define bfin_write_DMA6_Y_MODIFY(val) 		bfin_write32(DMA6_Y_MODIFY, val)
564 #define bfin_write_DMA6_CURR_DESC_PTR(val) 	bfin_write32(DMA6_CURR_DESC_PTR, val)
566 #define bfin_write_DMA6_PREV_DESC_PTR(val) 	bfin_write32(DMA6_PREV_DESC_PTR, val)
568 #define bfin_write_DMA6_CURR_ADDR(val) 		bfin_write32(DMA6_CURR_ADDR, val)
570 #define bfin_write_DMA6_IRQ_STATUS(val)		bfin_write32(DMA6_IRQ_STATUS, val)
572 #define bfin_write_DMA6_CURR_X_COUNT(val)	bfin_write32(DMA6_CURR_X_COUNT, val)
574 #define bfin_write_DMA6_CURR_Y_COUNT(val)	bfin_write32(DMA6_CURR_Y_COUNT, val)
576 #define bfin_write_DMA6_BWL_COUNT(val)		bfin_write32(DMA6_BWL_COUNT, val)
578 #define bfin_write_DMA6_CURR_BWL_COUNT(val)	bfin_write32(DMA6_CURR_BWL_COUNT, val)
580 #define bfin_write_DMA6_BWM_COUNT(val)		bfin_write32(DMA6_BWM_COUNT, val)
582 #define bfin_write_DMA6_CURR_BWM_COUNT(val)	bfin_write32(DMA6_CURR_BWM_COUNT, val)
587 #define bfin_write_DMA7_NEXT_DESC_PTR(val) 	bfin_write32(DMA7_NEXT_DESC_PTR, val)
589 #define bfin_write_DMA7_START_ADDR(val) 	bfin_write32(DMA7_START_ADDR, val)
591 #define bfin_write_DMA7_CONFIG(val)		bfin_write32(DMA7_CONFIG, val)
593 #define bfin_write_DMA7_X_COUNT(val)		bfin_write32(DMA7_X_COUNT, val)
595 #define bfin_write_DMA7_X_MODIFY(val) 		bfin_write32(DMA7_X_MODIFY, val)
597 #define bfin_write_DMA7_Y_COUNT(val)		bfin_write32(DMA7_Y_COUNT, val)
599 #define bfin_write_DMA7_Y_MODIFY(val) 		bfin_write32(DMA7_Y_MODIFY, val)
601 #define bfin_write_DMA7_CURR_DESC_PTR(val) 	bfin_write32(DMA7_CURR_DESC_PTR, val)
603 #define bfin_write_DMA7_PREV_DESC_PTR(val) 	bfin_write32(DMA7_PREV_DESC_PTR, val)
605 #define bfin_write_DMA7_CURR_ADDR(val) 		bfin_write32(DMA7_CURR_ADDR, val)
607 #define bfin_write_DMA7_IRQ_STATUS(val)		bfin_write32(DMA7_IRQ_STATUS, val)
609 #define bfin_write_DMA7_CURR_X_COUNT(val)	bfin_write32(DMA7_CURR_X_COUNT, val)
611 #define bfin_write_DMA7_CURR_Y_COUNT(val)	bfin_write32(DMA7_CURR_Y_COUNT, val)
613 #define bfin_write_DMA7_BWL_COUNT(val)		bfin_write32(DMA7_BWL_COUNT, val)
615 #define bfin_write_DMA7_CURR_BWL_COUNT(val)	bfin_write32(DMA7_CURR_BWL_COUNT, val)
617 #define bfin_write_DMA7_BWM_COUNT(val)		bfin_write32(DMA7_BWM_COUNT, val)
619 #define bfin_write_DMA7_CURR_BWM_COUNT(val)	bfin_write32(DMA7_CURR_BWM_COUNT, val)
624 #define bfin_write_DMA8_NEXT_DESC_PTR(val) 	bfin_write32(DMA8_NEXT_DESC_PTR, val)
626 #define bfin_write_DMA8_START_ADDR(val) 	bfin_write32(DMA8_START_ADDR, val)
628 #define bfin_write_DMA8_CONFIG(val)		bfin_write32(DMA8_CONFIG, val)
630 #define bfin_write_DMA8_X_COUNT(val)		bfin_write32(DMA8_X_COUNT, val)
632 #define bfin_write_DMA8_X_MODIFY(val) 		bfin_write32(DMA8_X_MODIFY, val)
634 #define bfin_write_DMA8_Y_COUNT(val)		bfin_write32(DMA8_Y_COUNT, val)
636 #define bfin_write_DMA8_Y_MODIFY(val) 		bfin_write32(DMA8_Y_MODIFY, val)
638 #define bfin_write_DMA8_CURR_DESC_PTR(val) 	bfin_write32(DMA8_CURR_DESC_PTR, val)
640 #define bfin_write_DMA8_PREV_DESC_PTR(val) 	bfin_write32(DMA8_PREV_DESC_PTR, val)
642 #define bfin_write_DMA8_CURR_ADDR(val) 		bfin_write32(DMA8_CURR_ADDR, val)
644 #define bfin_write_DMA8_IRQ_STATUS(val)		bfin_write32(DMA8_IRQ_STATUS, val)
646 #define bfin_write_DMA8_CURR_X_COUNT(val)	bfin_write32(DMA8_CURR_X_COUNT, val)
648 #define bfin_write_DMA8_CURR_Y_COUNT(val)	bfin_write32(DMA8_CURR_Y_COUNT, val)
650 #define bfin_write_DMA8_BWL_COUNT(val)		bfin_write32(DMA8_BWL_COUNT, val)
652 #define bfin_write_DMA8_CURR_BWL_COUNT(val)	bfin_write32(DMA8_CURR_BWL_COUNT, val)
654 #define bfin_write_DMA8_BWM_COUNT(val)		bfin_write32(DMA8_BWM_COUNT, val)
656 #define bfin_write_DMA8_CURR_BWM_COUNT(val)	bfin_write32(DMA8_CURR_BWM_COUNT, val)
661 #define bfin_write_DMA9_NEXT_DESC_PTR(val) 	bfin_write32(DMA9_NEXT_DESC_PTR, val)
663 #define bfin_write_DMA9_START_ADDR(val) 	bfin_write32(DMA9_START_ADDR, val)
665 #define bfin_write_DMA9_CONFIG(val)		bfin_write32(DMA9_CONFIG, val)
667 #define bfin_write_DMA9_X_COUNT(val)		bfin_write32(DMA9_X_COUNT, val)
669 #define bfin_write_DMA9_X_MODIFY(val) 		bfin_write32(DMA9_X_MODIFY, val)
671 #define bfin_write_DMA9_Y_COUNT(val)		bfin_write32(DMA9_Y_COUNT, val)
673 #define bfin_write_DMA9_Y_MODIFY(val) 		bfin_write32(DMA9_Y_MODIFY, val)
675 #define bfin_write_DMA9_CURR_DESC_PTR(val) 	bfin_write32(DMA9_CURR_DESC_PTR, val)
677 #define bfin_write_DMA9_PREV_DESC_PTR(val) 	bfin_write32(DMA9_PREV_DESC_PTR, val)
679 #define bfin_write_DMA9_CURR_ADDR(val) 		bfin_write32(DMA9_CURR_ADDR, val)
681 #define bfin_write_DMA9_IRQ_STATUS(val)		bfin_write32(DMA9_IRQ_STATUS, val)
683 #define bfin_write_DMA9_CURR_X_COUNT(val)	bfin_write32(DMA9_CURR_X_COUNT, val)
685 #define bfin_write_DMA9_CURR_Y_COUNT(val)	bfin_write32(DMA9_CURR_Y_COUNT, val)
687 #define bfin_write_DMA9_BWL_COUNT(val)		bfin_write32(DMA9_BWL_COUNT, val)
689 #define bfin_write_DMA9_CURR_BWL_COUNT(val)	bfin_write32(DMA9_CURR_BWL_COUNT, val)
691 #define bfin_write_DMA9_BWM_COUNT(val)		bfin_write32(DMA9_BWM_COUNT, val)
693 #define bfin_write_DMA9_CURR_BWM_COUNT(val)	bfin_write32(DMA9_CURR_BWM_COUNT, val)
698 #define bfin_write_DMA10_NEXT_DESC_PTR(val) 	bfin_write32(DMA10_NEXT_DESC_PTR, val)
700 #define bfin_write_DMA10_START_ADDR(val) 	bfin_write32(DMA10_START_ADDR, val)
702 #define bfin_write_DMA10_CONFIG(val)		bfin_write32(DMA10_CONFIG, val)
704 #define bfin_write_DMA10_X_COUNT(val)		bfin_write32(DMA10_X_COUNT, val)
706 #define bfin_write_DMA10_X_MODIFY(val) 		bfin_write32(DMA10_X_MODIFY, val)
708 #define bfin_write_DMA10_Y_COUNT(val)		bfin_write32(DMA10_Y_COUNT, val)
710 #define bfin_write_DMA10_Y_MODIFY(val) 		bfin_write32(DMA10_Y_MODIFY, val)
712 #define bfin_write_DMA10_CURR_DESC_PTR(val) 	bfin_write32(DMA10_CURR_DESC_PTR, val)
714 #define bfin_write_DMA10_PREV_DESC_PTR(val) 	bfin_write32(DMA10_PREV_DESC_PTR, val)
716 #define bfin_write_DMA10_CURR_ADDR(val) 	bfin_write32(DMA10_CURR_ADDR, val)
718 #define bfin_write_DMA10_IRQ_STATUS(val)	bfin_write32(DMA10_IRQ_STATUS, val)
720 #define bfin_write_DMA10_CURR_X_COUNT(val)	bfin_write32(DMA10_CURR_X_COUNT, val)
722 #define bfin_write_DMA10_CURR_Y_COUNT(val)	bfin_write32(DMA10_CURR_Y_COUNT, val)
724 #define bfin_write_DMA10_BWL_COUNT(val)		bfin_write32(DMA10_BWL_COUNT, val)
726 #define bfin_write_DMA10_CURR_BWL_COUNT(val)	bfin_write32(DMA10_CURR_BWL_COUNT, val)
728 #define bfin_write_DMA10_BWM_COUNT(val)		bfin_write32(DMA10_BWM_COUNT, val)
730 #define bfin_write_DMA10_CURR_BWM_COUNT(val)	bfin_write32(DMA10_CURR_BWM_COUNT, val)
735 #define bfin_write_DMA11_NEXT_DESC_PTR(val) 	bfin_write32(DMA11_NEXT_DESC_PTR, val)
737 #define bfin_write_DMA11_START_ADDR(val) 	bfin_write32(DMA11_START_ADDR, val)
739 #define bfin_write_DMA11_CONFIG(val)		bfin_write32(DMA11_CONFIG, val)
741 #define bfin_write_DMA11_X_COUNT(val)		bfin_write32(DMA11_X_COUNT, val)
743 #define bfin_write_DMA11_X_MODIFY(val) 		bfin_write32(DMA11_X_MODIFY, val)
745 #define bfin_write_DMA11_Y_COUNT(val)		bfin_write32(DMA11_Y_COUNT, val)
747 #define bfin_write_DMA11_Y_MODIFY(val) 		bfin_write32(DMA11_Y_MODIFY, val)
749 #define bfin_write_DMA11_CURR_DESC_PTR(val) 	bfin_write32(DMA11_CURR_DESC_PTR, val)
751 #define bfin_write_DMA11_PREV_DESC_PTR(val) 	bfin_write32(DMA11_PREV_DESC_PTR, val)
753 #define bfin_write_DMA11_CURR_ADDR(val) 	bfin_write32(DMA11_CURR_ADDR, val)
755 #define bfin_write_DMA11_IRQ_STATUS(val)	bfin_write32(DMA11_IRQ_STATUS, val)
757 #define bfin_write_DMA11_CURR_X_COUNT(val)	bfin_write32(DMA11_CURR_X_COUNT, val)
759 #define bfin_write_DMA11_CURR_Y_COUNT(val)	bfin_write32(DMA11_CURR_Y_COUNT, val)
761 #define bfin_write_DMA11_BWL_COUNT(val)		bfin_write32(DMA11_BWL_COUNT, val)
763 #define bfin_write_DMA11_CURR_BWL_COUNT(val)	bfin_write32(DMA11_CURR_BWL_COUNT, val)
765 #define bfin_write_DMA11_BWM_COUNT(val)		bfin_write32(DMA11_BWM_COUNT, val)
767 #define bfin_write_DMA11_CURR_BWM_COUNT(val)	bfin_write32(DMA11_CURR_BWM_COUNT, val)
772 #define bfin_write_DMA12_NEXT_DESC_PTR(val) 	bfin_write32(DMA12_NEXT_DESC_PTR, val)
774 #define bfin_write_DMA12_START_ADDR(val) 	bfin_write32(DMA12_START_ADDR, val)
776 #define bfin_write_DMA12_CONFIG(val)		bfin_write32(DMA12_CONFIG, val)
778 #define bfin_write_DMA12_X_COUNT(val)		bfin_write32(DMA12_X_COUNT, val)
780 #define bfin_write_DMA12_X_MODIFY(val) 		bfin_write32(DMA12_X_MODIFY, val)
782 #define bfin_write_DMA12_Y_COUNT(val)		bfin_write32(DMA12_Y_COUNT, val)
784 #define bfin_write_DMA12_Y_MODIFY(val) 		bfin_write32(DMA12_Y_MODIFY, val)
786 #define bfin_write_DMA12_CURR_DESC_PTR(val) 	bfin_write32(DMA12_CURR_DESC_PTR, val)
788 #define bfin_write_DMA12_PREV_DESC_PTR(val) 	bfin_write32(DMA12_PREV_DESC_PTR, val)
790 #define bfin_write_DMA12_CURR_ADDR(val) 	bfin_write32(DMA12_CURR_ADDR, val)
792 #define bfin_write_DMA12_IRQ_STATUS(val)	bfin_write32(DMA12_IRQ_STATUS, val)
794 #define bfin_write_DMA12_CURR_X_COUNT(val)	bfin_write32(DMA12_CURR_X_COUNT, val)
796 #define bfin_write_DMA12_CURR_Y_COUNT(val)	bfin_write32(DMA12_CURR_Y_COUNT, val)
798 #define bfin_write_DMA12_BWL_COUNT(val)		bfin_write32(DMA12_BWL_COUNT, val)
800 #define bfin_write_DMA12_CURR_BWL_COUNT(val)	bfin_write32(DMA12_CURR_BWL_COUNT, val)
802 #define bfin_write_DMA12_BWM_COUNT(val)		bfin_write32(DMA12_BWM_COUNT, val)
804 #define bfin_write_DMA12_CURR_BWM_COUNT(val)	bfin_write32(DMA12_CURR_BWM_COUNT, val)
809 #define bfin_write_DMA13_NEXT_DESC_PTR(val) 	bfin_write32(DMA13_NEXT_DESC_PTR, val)
811 #define bfin_write_DMA13_START_ADDR(val) 	bfin_write32(DMA13_START_ADDR, val)
813 #define bfin_write_DMA13_CONFIG(val)		bfin_write32(DMA13_CONFIG, val)
815 #define bfin_write_DMA13_X_COUNT(val)		bfin_write32(DMA13_X_COUNT, val)
817 #define bfin_write_DMA13_X_MODIFY(val) 		bfin_write32(DMA13_X_MODIFY, val)
819 #define bfin_write_DMA13_Y_COUNT(val)		bfin_write32(DMA13_Y_COUNT, val)
821 #define bfin_write_DMA13_Y_MODIFY(val) 		bfin_write32(DMA13_Y_MODIFY, val)
823 #define bfin_write_DMA13_CURR_DESC_PTR(val) 	bfin_write32(DMA13_CURR_DESC_PTR, val)
825 #define bfin_write_DMA13_PREV_DESC_PTR(val) 	bfin_write32(DMA13_PREV_DESC_PTR, val)
827 #define bfin_write_DMA13_CURR_ADDR(val) 	bfin_write32(DMA13_CURR_ADDR, val)
829 #define bfin_write_DMA13_IRQ_STATUS(val)	bfin_write32(DMA13_IRQ_STATUS, val)
831 #define bfin_write_DMA13_CURR_X_COUNT(val)	bfin_write32(DMA13_CURR_X_COUNT, val)
833 #define bfin_write_DMA13_CURR_Y_COUNT(val)	bfin_write32(DMA13_CURR_Y_COUNT, val)
835 #define bfin_write_DMA13_BWL_COUNT(val)		bfin_write32(DMA13_BWL_COUNT, val)
837 #define bfin_write_DMA13_CURR_BWL_COUNT(val)	bfin_write32(DMA13_CURR_BWL_COUNT, val)
839 #define bfin_write_DMA13_BWM_COUNT(val)		bfin_write32(DMA13_BWM_COUNT, val)
841 #define bfin_write_DMA13_CURR_BWM_COUNT(val)	bfin_write32(DMA13_CURR_BWM_COUNT, val)
846 #define bfin_write_DMA14_NEXT_DESC_PTR(val) 	bfin_write32(DMA14_NEXT_DESC_PTR, val)
848 #define bfin_write_DMA14_START_ADDR(val) 	bfin_write32(DMA14_START_ADDR, val)
850 #define bfin_write_DMA14_CONFIG(val)		bfin_write32(DMA14_CONFIG, val)
852 #define bfin_write_DMA14_X_COUNT(val)		bfin_write32(DMA14_X_COUNT, val)
854 #define bfin_write_DMA14_X_MODIFY(val) 		bfin_write32(DMA14_X_MODIFY, val)
856 #define bfin_write_DMA14_Y_COUNT(val)		bfin_write32(DMA14_Y_COUNT, val)
858 #define bfin_write_DMA14_Y_MODIFY(val) 		bfin_write32(DMA14_Y_MODIFY, val)
860 #define bfin_write_DMA14_CURR_DESC_PTR(val) 	bfin_write32(DMA14_CURR_DESC_PTR, val)
862 #define bfin_write_DMA14_PREV_DESC_PTR(val) 	bfin_write32(DMA14_PREV_DESC_PTR, val)
864 #define bfin_write_DMA14_CURR_ADDR(val) 	bfin_write32(DMA14_CURR_ADDR, val)
866 #define bfin_write_DMA14_IRQ_STATUS(val)	bfin_write32(DMA14_IRQ_STATUS, val)
868 #define bfin_write_DMA14_CURR_X_COUNT(val)	bfin_write32(DMA14_CURR_X_COUNT, val)
870 #define bfin_write_DMA14_CURR_Y_COUNT(val)	bfin_write32(DMA14_CURR_Y_COUNT, val)
872 #define bfin_write_DMA14_BWL_COUNT(val)		bfin_write32(DMA14_BWL_COUNT, val)
874 #define bfin_write_DMA14_CURR_BWL_COUNT(val)	bfin_write32(DMA14_CURR_BWL_COUNT, val)
876 #define bfin_write_DMA14_BWM_COUNT(val)		bfin_write32(DMA14_BWM_COUNT, val)
878 #define bfin_write_DMA14_CURR_BWM_COUNT(val)	bfin_write32(DMA14_CURR_BWM_COUNT, val)
883 #define bfin_write_DMA15_NEXT_DESC_PTR(val) 	bfin_write32(DMA15_NEXT_DESC_PTR, val)
885 #define bfin_write_DMA15_START_ADDR(val) 	bfin_write32(DMA15_START_ADDR, val)
887 #define bfin_write_DMA15_CONFIG(val)		bfin_write32(DMA15_CONFIG, val)
889 #define bfin_write_DMA15_X_COUNT(val)		bfin_write32(DMA15_X_COUNT, val)
891 #define bfin_write_DMA15_X_MODIFY(val) 		bfin_write32(DMA15_X_MODIFY, val)
893 #define bfin_write_DMA15_Y_COUNT(val)		bfin_write32(DMA15_Y_COUNT, val)
895 #define bfin_write_DMA15_Y_MODIFY(val) 		bfin_write32(DMA15_Y_MODIFY, val)
897 #define bfin_write_DMA15_CURR_DESC_PTR(val) 	bfin_write32(DMA15_CURR_DESC_PTR, val)
899 #define bfin_write_DMA15_PREV_DESC_PTR(val) 	bfin_write32(DMA15_PREV_DESC_PTR, val)
901 #define bfin_write_DMA15_CURR_ADDR(val) 	bfin_write32(DMA15_CURR_ADDR, val)
903 #define bfin_write_DMA15_IRQ_STATUS(val)	bfin_write32(DMA15_IRQ_STATUS, val)
905 #define bfin_write_DMA15_CURR_X_COUNT(val)	bfin_write32(DMA15_CURR_X_COUNT, val)
907 #define bfin_write_DMA15_CURR_Y_COUNT(val)	bfin_write32(DMA15_CURR_Y_COUNT, val)
909 #define bfin_write_DMA15_BWL_COUNT(val)		bfin_write32(DMA15_BWL_COUNT, val)
911 #define bfin_write_DMA15_CURR_BWL_COUNT(val)	bfin_write32(DMA15_CURR_BWL_COUNT, val)
913 #define bfin_write_DMA15_BWM_COUNT(val)		bfin_write32(DMA15_BWM_COUNT, val)
915 #define bfin_write_DMA15_CURR_BWM_COUNT(val)	bfin_write32(DMA15_CURR_BWM_COUNT, val)
920 #define bfin_write_DMA16_NEXT_DESC_PTR(val) 	bfin_write32(DMA16_NEXT_DESC_PTR, val)
922 #define bfin_write_DMA16_START_ADDR(val) 	bfin_write32(DMA16_START_ADDR, val)
924 #define bfin_write_DMA16_CONFIG(val)		bfin_write32(DMA16_CONFIG, val)
926 #define bfin_write_DMA16_X_COUNT(val)		bfin_write32(DMA16_X_COUNT, val)
928 #define bfin_write_DMA16_X_MODIFY(val) 		bfin_write32(DMA16_X_MODIFY, val)
930 #define bfin_write_DMA16_Y_COUNT(val)		bfin_write32(DMA16_Y_COUNT, val)
932 #define bfin_write_DMA16_Y_MODIFY(val) 		bfin_write32(DMA16_Y_MODIFY, val)
934 #define bfin_write_DMA16_CURR_DESC_PTR(val) 	bfin_write32(DMA16_CURR_DESC_PTR, val)
936 #define bfin_write_DMA16_PREV_DESC_PTR(val) 	bfin_write32(DMA16_PREV_DESC_PTR, val)
938 #define bfin_write_DMA16_CURR_ADDR(val) 	bfin_write32(DMA16_CURR_ADDR, val)
940 #define bfin_write_DMA16_IRQ_STATUS(val)	bfin_write32(DMA16_IRQ_STATUS, val)
942 #define bfin_write_DMA16_CURR_X_COUNT(val)	bfin_write32(DMA16_CURR_X_COUNT, val)
944 #define bfin_write_DMA16_CURR_Y_COUNT(val)	bfin_write32(DMA16_CURR_Y_COUNT, val)
946 #define bfin_write_DMA16_BWL_COUNT(val)		bfin_write32(DMA16_BWL_COUNT, val)
948 #define bfin_write_DMA16_CURR_BWL_COUNT(val)	bfin_write32(DMA16_CURR_BWL_COUNT, val)
950 #define bfin_write_DMA16_BWM_COUNT(val)		bfin_write32(DMA16_BWM_COUNT, val)
952 #define bfin_write_DMA16_CURR_BWM_COUNT(val)	bfin_write32(DMA16_CURR_BWM_COUNT, val)
957 #define bfin_write_DMA17_NEXT_DESC_PTR(val) 	bfin_write32(DMA17_NEXT_DESC_PTR, val)
959 #define bfin_write_DMA17_START_ADDR(val) 	bfin_write32(DMA17_START_ADDR, val)
961 #define bfin_write_DMA17_CONFIG(val)		bfin_write32(DMA17_CONFIG, val)
963 #define bfin_write_DMA17_X_COUNT(val)		bfin_write32(DMA17_X_COUNT, val)
965 #define bfin_write_DMA17_X_MODIFY(val) 		bfin_write32(DMA17_X_MODIFY, val)
967 #define bfin_write_DMA17_Y_COUNT(val)		bfin_write32(DMA17_Y_COUNT, val)
969 #define bfin_write_DMA17_Y_MODIFY(val) 		bfin_write32(DMA17_Y_MODIFY, val)
971 #define bfin_write_DMA17_CURR_DESC_PTR(val) 	bfin_write32(DMA17_CURR_DESC_PTR, val)
973 #define bfin_write_DMA17_PREV_DESC_PTR(val) 	bfin_write32(DMA17_PREV_DESC_PTR, val)
975 #define bfin_write_DMA17_CURR_ADDR(val) 	bfin_write32(DMA17_CURR_ADDR, val)
977 #define bfin_write_DMA17_IRQ_STATUS(val)	bfin_write32(DMA17_IRQ_STATUS, val)
979 #define bfin_write_DMA17_CURR_X_COUNT(val)	bfin_write32(DMA17_CURR_X_COUNT, val)
981 #define bfin_write_DMA17_CURR_Y_COUNT(val)	bfin_write32(DMA17_CURR_Y_COUNT, val)
983 #define bfin_write_DMA17_BWL_COUNT(val)		bfin_write32(DMA17_BWL_COUNT, val)
985 #define bfin_write_DMA17_CURR_BWL_COUNT(val)	bfin_write32(DMA17_CURR_BWL_COUNT, val)
987 #define bfin_write_DMA17_BWM_COUNT(val)		bfin_write32(DMA17_BWM_COUNT, val)
989 #define bfin_write_DMA17_CURR_BWM_COUNT(val)	bfin_write32(DMA17_CURR_BWM_COUNT, val)
994 #define bfin_write_DMA18_NEXT_DESC_PTR(val) 	bfin_write32(DMA18_NEXT_DESC_PTR, val)
996 #define bfin_write_DMA18_START_ADDR(val) 	bfin_write32(DMA18_START_ADDR, val)
998 #define bfin_write_DMA18_CONFIG(val)		bfin_write32(DMA18_CONFIG, val)
1000 #define bfin_write_DMA18_X_COUNT(val)		bfin_write32(DMA18_X_COUNT, val)
1002 #define bfin_write_DMA18_X_MODIFY(val) 		bfin_write32(DMA18_X_MODIFY, val)
1004 #define bfin_write_DMA18_Y_COUNT(val)		bfin_write32(DMA18_Y_COUNT, val)
1006 #define bfin_write_DMA18_Y_MODIFY(val) 		bfin_write32(DMA18_Y_MODIFY, val)
1008 #define bfin_write_DMA18_CURR_DESC_PTR(val) 	bfin_write32(DMA18_CURR_DESC_PTR, val)
1010 #define bfin_write_DMA18_PREV_DESC_PTR(val) 	bfin_write32(DMA18_PREV_DESC_PTR, val)
1012 #define bfin_write_DMA18_CURR_ADDR(val) 	bfin_write32(DMA18_CURR_ADDR, val)
1014 #define bfin_write_DMA18_IRQ_STATUS(val)	bfin_write32(DMA18_IRQ_STATUS, val)
1016 #define bfin_write_DMA18_CURR_X_COUNT(val)	bfin_write32(DMA18_CURR_X_COUNT, val)
1018 #define bfin_write_DMA18_CURR_Y_COUNT(val)	bfin_write32(DMA18_CURR_Y_COUNT, val)
1020 #define bfin_write_DMA18_BWL_COUNT(val)		bfin_write32(DMA18_BWL_COUNT, val)
1022 #define bfin_write_DMA18_CURR_BWL_COUNT(val)	bfin_write32(DMA18_CURR_BWL_COUNT, val)
1024 #define bfin_write_DMA18_BWM_COUNT(val)		bfin_write32(DMA18_BWM_COUNT, val)
1026 #define bfin_write_DMA18_CURR_BWM_COUNT(val)	bfin_write32(DMA18_CURR_BWM_COUNT, val)
1031 #define bfin_write_DMA19_NEXT_DESC_PTR(val) 	bfin_write32(DMA19_NEXT_DESC_PTR, val)
1033 #define bfin_write_DMA19_START_ADDR(val) 	bfin_write32(DMA19_START_ADDR, val)
1035 #define bfin_write_DMA19_CONFIG(val)		bfin_write32(DMA19_CONFIG, val)
1037 #define bfin_write_DMA19_X_COUNT(val)		bfin_write32(DMA19_X_COUNT, val)
1039 #define bfin_write_DMA19_X_MODIFY(val) 		bfin_write32(DMA19_X_MODIFY, val)
1041 #define bfin_write_DMA19_Y_COUNT(val)		bfin_write32(DMA19_Y_COUNT, val)
1043 #define bfin_write_DMA19_Y_MODIFY(val) 		bfin_write32(DMA19_Y_MODIFY, val)
1045 #define bfin_write_DMA19_CURR_DESC_PTR(val) 	bfin_write32(DMA19_CURR_DESC_PTR, val)
1047 #define bfin_write_DMA19_PREV_DESC_PTR(val) 	bfin_write32(DMA19_PREV_DESC_PTR, val)
1049 #define bfin_write_DMA19_CURR_ADDR(val) 	bfin_write32(DMA19_CURR_ADDR, val)
1051 #define bfin_write_DMA19_IRQ_STATUS(val)	bfin_write32(DMA19_IRQ_STATUS, val)
1053 #define bfin_write_DMA19_CURR_X_COUNT(val)	bfin_write32(DMA19_CURR_X_COUNT, val)
1055 #define bfin_write_DMA19_CURR_Y_COUNT(val)	bfin_write32(DMA19_CURR_Y_COUNT, val)
1057 #define bfin_write_DMA19_BWL_COUNT(val)		bfin_write32(DMA19_BWL_COUNT, val)
1059 #define bfin_write_DMA19_CURR_BWL_COUNT(val)	bfin_write32(DMA19_CURR_BWL_COUNT, val)
1061 #define bfin_write_DMA19_BWM_COUNT(val)		bfin_write32(DMA19_BWM_COUNT, val)
1063 #define bfin_write_DMA19_CURR_BWM_COUNT(val)	bfin_write32(DMA19_CURR_BWM_COUNT, val)
1068 #define bfin_write_DMA20_NEXT_DESC_PTR(val) 	bfin_write32(DMA20_NEXT_DESC_PTR, val)
1070 #define bfin_write_DMA20_START_ADDR(val) 	bfin_write32(DMA20_START_ADDR, val)
1072 #define bfin_write_DMA20_CONFIG(val)		bfin_write32(DMA20_CONFIG, val)
1074 #define bfin_write_DMA20_X_COUNT(val)		bfin_write32(DMA20_X_COUNT, val)
1076 #define bfin_write_DMA20_X_MODIFY(val) 		bfin_write32(DMA20_X_MODIFY, val)
1078 #define bfin_write_DMA20_Y_COUNT(val)		bfin_write32(DMA20_Y_COUNT, val)
1080 #define bfin_write_DMA20_Y_MODIFY(val) 		bfin_write32(DMA20_Y_MODIFY, val)
1082 #define bfin_write_DMA20_CURR_DESC_PTR(val) 	bfin_write32(DMA20_CURR_DESC_PTR, val)
1084 #define bfin_write_DMA20_PREV_DESC_PTR(val) 	bfin_write32(DMA20_PREV_DESC_PTR, val)
1086 #define bfin_write_DMA20_CURR_ADDR(val) 	bfin_write32(DMA20_CURR_ADDR, val)
1088 #define bfin_write_DMA20_IRQ_STATUS(val)	bfin_write32(DMA20_IRQ_STATUS, val)
1090 #define bfin_write_DMA20_CURR_X_COUNT(val)	bfin_write32(DMA20_CURR_X_COUNT, val)
1092 #define bfin_write_DMA20_CURR_Y_COUNT(val)	bfin_write32(DMA20_CURR_Y_COUNT, val)
1094 #define bfin_write_DMA20_BWL_COUNT(val)		bfin_write32(DMA20_BWL_COUNT, val)
1096 #define bfin_write_DMA20_CURR_BWL_COUNT(val)	bfin_write32(DMA20_CURR_BWL_COUNT, val)
1098 #define bfin_write_DMA20_BWM_COUNT(val)		bfin_write32(DMA20_BWM_COUNT, val)
1100 #define bfin_write_DMA20_CURR_BWM_COUNT(val)	bfin_write32(DMA20_CURR_BWM_COUNT, val)
1106 #define bfin_write_MDMA0_DEST_CRC0_NEXT_DESC_PTR(val) 	bfin_write32(MDMA0_DEST_CRC0_NEXT_DESC_PTR, …
1108 #define bfin_write_MDMA0_DEST_CRC0_START_ADDR(val) 	bfin_write32(MDMA0_DEST_CRC0_START_ADDR, val)
1110 #define bfin_write_MDMA0_DEST_CRC0_CONFIG(val)		bfin_write32(MDMA0_DEST_CRC0_CONFIG, val)
1112 #define bfin_write_MDMA0_DEST_CRC0_X_COUNT(val)		bfin_write32(MDMA0_DEST_CRC0_X_COUNT, val)
1114 #define bfin_write_MDMA0_DEST_CRC0_X_MODIFY(val) 	bfin_write32(MDMA0_DEST_CRC0_X_MODIFY, val)
1116 #define bfin_write_MDMA0_DEST_CRC0_Y_COUNT(val)		bfin_write32(MDMA0_DEST_CRC0_Y_COUNT, val)
1118 #define bfin_write_MDMA0_DEST_CRC0_Y_MODIFY(val) 	bfin_write32(MDMA0_DEST_CRC0_Y_MODIFY, val)
1120 #define bfin_write_MDMA0_DEST_CRC0_CURR_DESC_PTR(val) 	bfin_write32(MDMA0_DEST_CRC0_CURR_DESC_PTR, …
1122 #define bfin_write_MDMA0_DEST_CRC0_PREV_DESC_PTR(val) 	bfin_write32(MDMA0_DEST_CRC0_PREV_DESC_PTR, …
1124 #define bfin_write_MDMA0_DEST_CRC0_CURR_ADDR(val) 	bfin_write32(MDMA0_DEST_CRC0_CURR_ADDR, val)
1126 #define bfin_write_MDMA0_DEST_CRC0_IRQ_STATUS(val)	bfin_write32(MDMA0_DEST_CRC0_IRQ_STATUS, val)
1128 #define bfin_write_MDMA0_DEST_CRC0_CURR_X_COUNT(val)	bfin_write32(MDMA0_DEST_CRC0_CURR_X_COUNT, val)
1130 #define bfin_write_MDMA0_DEST_CRC0_CURR_Y_COUNT(val)	bfin_write32(MDMA0_DEST_CRC0_CURR_Y_COUNT, val)
1132 #define bfin_write_MDMA0_SRC_CRC0_NEXT_DESC_PTR(val) 	bfin_write32(MDMA0_SRC_CRC0_NEXT_DESC_PTR, va…
1134 #define bfin_write_MDMA0_SRC_CRC0_START_ADDR(val) 	bfin_write32(MDMA0_SRC_CRC0_START_ADDR, val)
1136 #define bfin_write_MDMA0_SRC_CRC0_CONFIG(val)		bfin_write32(MDMA0_SRC_CRC0_CONFIG, val)
1138 #define bfin_write_MDMA0_SRC_CRC0_X_COUNT(val)		bfin_write32(MDMA0_SRC_CRC0_X_COUNT, val)
1140 #define bfin_write_MDMA0_SRC_CRC0_X_MODIFY(val) 	bfin_write32(MDMA0_SRC_CRC0_X_MODIFY, val)
1142 #define bfin_write_MDMA0_SRC_CRC0_Y_COUNT(val)		bfin_write32(MDMA0_SRC_CRC0_Y_COUNT, val)
1144 #define bfin_write_MDMA0_SRC_CRC0_Y_MODIFY(val) 	bfin_write32(MDMA0_SRC_CRC0_Y_MODIFY, val)
1146 #define bfin_write_MDMA0_SRC_CRC0_CURR_DESC_PTR(val) 	bfin_write32(MDMA0_SRC_CRC0_CURR_DESC_PTR, va…
1148 #define bfin_write_MDMA0_SRC_CRC0_PREV_DESC_PTR(val) 	bfin_write32(MDMA0_SRC_CRC0_PREV_DESC_PTR, va…
1150 #define bfin_write_MDMA0_SRC_CRC0_CURR_ADDR(val) 	bfin_write32(MDMA0_SRC_CRC0_CURR_ADDR, val)
1152 #define bfin_write_MDMA0_SRC_CRC0_IRQ_STATUS(val)	bfin_write32(MDMA0_SRC_CRC0_IRQ_STATUS, val)
1154 #define bfin_write_MDMA0_SRC_CRC0_CURR_X_COUNT(val)	bfin_write32(MDMA0_SRC_CRC0_CURR_X_COUNT, val)
1156 #define bfin_write_MDMA0_SRC_CRC0_CURR_Y_COUNT(val)	bfin_write32(MDMA0_SRC_CRC0_CURR_Y_COUNT, val)
1161 #define bfin_write_MDMA1_DEST_CRC1_NEXT_DESC_PTR(val) 	bfin_write32(MDMA1_DEST_CRC1_NEXT_DESC_PTR, …
1163 #define bfin_write_MDMA1_DEST_CRC1_START_ADDR(val) 	bfin_write32(MDMA1_DEST_CRC1_START_ADDR, val)
1165 #define bfin_write_MDMA1_DEST_CRC1_CONFIG(val)		bfin_write32(MDMA1_DEST_CRC1_CONFIG, val)
1167 #define bfin_write_MDMA1_DEST_CRC1_X_COUNT(val)		bfin_write32(MDMA1_DEST_CRC1_X_COUNT, val)
1169 #define bfin_write_MDMA1_DEST_CRC1_X_MODIFY(val) 	bfin_write32(MDMA1_DEST_CRC1_X_MODIFY, val)
1171 #define bfin_write_MDMA1_DEST_CRC1_Y_COUNT(val)		bfin_write32(MDMA1_DEST_CRC1_Y_COUNT, val)
1173 #define bfin_write_MDMA1_DEST_CRC1_Y_MODIFY(val) 	bfin_write32(MDMA1_DEST_CRC1_Y_MODIFY, val)
1175 #define bfin_write_MDMA1_DEST_CRC1_CURR_DESC_PTR(val) 	bfin_write32(MDMA1_DEST_CRC1_CURR_DESC_PTR, …
1177 #define bfin_write_MDMA1_DEST_CRC1_PREV_DESC_PTR(val) 	bfin_write32(MDMA1_DEST_CRC1_PREV_DESC_PTR, …
1179 #define bfin_write_MDMA1_DEST_CRC1_CURR_ADDR(val) 	bfin_write32(MDMA1_DEST_CRC1_CURR_ADDR, val)
1181 #define bfin_write_MDMA1_DEST_CRC1_IRQ_STATUS(val)	bfin_write32(MDMA1_DEST_CRC1_IRQ_STATUS, val)
1183 #define bfin_write_MDMA1_DEST_CRC1_CURR_X_COUNT(val)	bfin_write32(MDMA1_DEST_CRC1_CURR_X_COUNT, val)
1185 #define bfin_write_MDMA1_DEST_CRC1_CURR_Y_COUNT(val)	bfin_write32(MDMA1_DEST_CRC1_CURR_Y_COUNT, val)
1187 #define bfin_write_MDMA1_SRC_CRC1_NEXT_DESC_PTR(val) 	bfin_write32(MDMA1_SRC_CRC1_NEXT_DESC_PTR, va…
1189 #define bfin_write_MDMA1_SRC_CRC1_START_ADDR(val) 	bfin_write32(MDMA1_SRC_CRC1_START_ADDR, val)
1191 #define bfin_write_MDMA1_SRC_CRC1_CONFIG(val)		bfin_write32(MDMA1_SRC_CRC1_CONFIG, val)
1193 #define bfin_write_MDMA1_SRC_CRC1_X_COUNT(val)		bfin_write32(MDMA1_SRC_CRC1_X_COUNT, val)
1195 #define bfin_write_MDMA1_SRC_CRC1_X_MODIFY(val) 	bfin_write32(MDMA1_SRC_CRC1_X_MODIFY, val)
1197 #define bfin_write_MDMA1_SRC_CRC1_Y_COUNT(val)		bfin_write32(MDMA1_SRC_CRC1_Y_COUNT, val)
1199 #define bfin_write_MDMA1_SRC_CRC1_Y_MODIFY(val) 	bfin_write32(MDMA1_SRC_CRC1_Y_MODIFY, val)
1201 #define bfin_write_MDMA1_SRC_CRC1_CURR_DESC_PTR(val) 	bfin_write32(MDMA1_SRC_CRC1_CURR_DESC_PTR, va…
1203 #define bfin_write_MDMA1_SRC_CRC1_PREV_DESC_PTR(val) 	bfin_write32(MDMA1_SRC_CRC1_PREV_DESC_PTR, va…
1205 #define bfin_write_MDMA1_SRC_CRC1_CURR_ADDR(val) 	bfin_write32(MDMA1_SRC_CRC1_CURR_ADDR, val)
1207 #define bfin_write_MDMA1_SRC_CRC1_IRQ_STATUS(val)	bfin_write32(MDMA1_SRC_CRC1_IRQ_STATUS, val)
1209 #define bfin_write_MDMA1_SRC_CRC1_CURR_X_COUNT(val)	bfin_write32(MDMA1_SRC_CRC1_CURR_X_COUNT, val)
1211 #define bfin_write_MDMA1_SRC_CRC1_CURR_Y_COUNT(val)	bfin_write32(MDMA1_SRC_CRC1_CURR_Y_COUNT, val)
1217 #define bfin_write_MDMA2_DEST_NEXT_DESC_PTR(val) 	bfin_write32(MDMA2_DEST_NEXT_DESC_PTR, val)
1219 #define bfin_write_MDMA2_DEST_START_ADDR(val) 		bfin_write32(MDMA2_DEST_START_ADDR, val)
1221 #define bfin_write_MDMA2_DEST_CONFIG(val)		bfin_write32(MDMA2_DEST_CONFIG, val)
1223 #define bfin_write_MDMA2_DEST_X_COUNT(val)		bfin_write32(MDMA2_DEST_X_COUNT, val)
1225 #define bfin_write_MDMA2_DEST_X_MODIFY(val) 		bfin_write32(MDMA2_DEST_X_MODIFY, val)
1227 #define bfin_write_MDMA2_DEST_Y_COUNT(val)		bfin_write32(MDMA2_DEST_Y_COUNT, val)
1229 #define bfin_write_MDMA2_DEST_Y_MODIFY(val) 		bfin_write32(MDMA2_DEST_Y_MODIFY, val)
1231 #define bfin_write_MDMA2_DEST_CURR_DESC_PTR(val) 	bfin_write32(MDMA2_DEST_CURR_DESC_PTR, val)
1233 #define bfin_write_MDMA2_DEST_PREV_DESC_PTR(val) 	bfin_write32(MDMA2_DEST_PREV_DESC_PTR, val)
1235 #define bfin_write_MDMA2_DEST_CURR_ADDR(val) 		bfin_write32(MDMA2_DEST_CURR_ADDR, val)
1237 #define bfin_write_MDMA2_DEST_IRQ_STATUS(val)		bfin_write32(MDMA2_DEST_IRQ_STATUS, val)
1239 #define bfin_write_MDMA2_DEST_CURR_X_COUNT(val)		bfin_write32(MDMA2_DEST_CURR_X_COUNT, val)
1241 #define bfin_write_MDMA2_DEST_CURR_Y_COUNT(val)		bfin_write32(MDMA2_DEST_CURR_Y_COUNT, val)
1243 #define bfin_write_MDMA2_SRC_NEXT_DESC_PTR(val) 	bfin_write32(MDMA2_SRC_NEXT_DESC_PTR, val)
1245 #define bfin_write_MDMA2_SRC_START_ADDR(val) 		bfin_write32(MDMA2_SRC_START_ADDR, val)
1247 #define bfin_write_MDMA2_SRC_CONFIG(val)		bfin_write32(MDMA2_SRC_CONFIG, val)
1249 #define bfin_write_MDMA2_SRC_X_COUNT(val)		bfin_write32(MDMA2_SRC_X_COUNT, val)
1251 #define bfin_write_MDMA2_SRC_X_MODIFY(val) 		bfin_write32(MDMA2_SRC_X_MODIFY, val)
1253 #define bfin_write_MDMA2_SRC_Y_COUNT(val)		bfin_write32(MDMA2_SRC_Y_COUNT, val)
1255 #define bfin_write_MDMA2_SRC_Y_MODIFY(val) 		bfin_write32(MDMA2_SRC_Y_MODIFY, val)
1257 #define bfin_write_MDMA2_SRC_CURR_DESC_PTR(val)		bfin_write32(MDMA2_SRC_CURR_DESC_PTR, val)
1259 #define bfin_write_MDMA2_SRC_PREV_DESC_PTR(val) 	bfin_write32(MDMA2_SRC_PREV_DESC_PTR, val)
1261 #define bfin_write_MDMA2_SRC_CURR_ADDR(val) 		bfin_write32(MDMA2_SRC_CURR_ADDR, val)
1263 #define bfin_write_MDMA2_SRC_IRQ_STATUS(val)		bfin_write32(MDMA2_SRC_IRQ_STATUS, val)
1265 #define bfin_write_MDMA2_SRC_CURR_X_COUNT(val)		bfin_write32(MDMA2_SRC_CURR_X_COUNT, val)
1267 #define bfin_write_MDMA2_SRC_CURR_Y_COUNT(val)		bfin_write32(MDMA2_SRC_CURR_Y_COUNT, val)
1272 #define bfin_write_MDMA3_DEST_NEXT_DESC_PTR(val) 	bfin_write32(MDMA3_DEST_NEXT_DESC_PTR, val)
1274 #define bfin_write_MDMA3_DEST_START_ADDR(val) 		bfin_write32(MDMA3_DEST_START_ADDR, val)
1276 #define bfin_write_MDMA3_DEST_CONFIG(val)		bfin_write32(MDMA3_DEST_CONFIG, val)
1278 #define bfin_write_MDMA3_DEST_X_COUNT(val)		bfin_write32(MDMA3_DEST_X_COUNT, val)
1280 #define bfin_write_MDMA3_DEST_X_MODIFY(val) 		bfin_write32(MDMA3_DEST_X_MODIFY, val)
1282 #define bfin_write_MDMA3_DEST_Y_COUNT(val)		bfin_write32(MDMA3_DEST_Y_COUNT, val)
1284 #define bfin_write_MDMA3_DEST_Y_MODIFY(val) 		bfin_write32(MDMA3_DEST_Y_MODIFY, val)
1286 #define bfin_write_MDMA3_DEST_CURR_DESC_PTR(val) 	bfin_write32(MDMA3_DEST_CURR_DESC_PTR, val)
1288 #define bfin_write_MDMA3_DEST_PREV_DESC_PTR(val) 	bfin_write32(MDMA3_DEST_PREV_DESC_PTR, val)
1290 #define bfin_write_MDMA3_DEST_CURR_ADDR(val) 		bfin_write32(MDMA3_DEST_CURR_ADDR, val)
1292 #define bfin_write_MDMA3_DEST_IRQ_STATUS(val)		bfin_write32(MDMA3_DEST_IRQ_STATUS, val)
1294 #define bfin_write_MDMA3_DEST_CURR_X_COUNT(val)		bfin_write32(MDMA3_DEST_CURR_X_COUNT, val)
1296 #define bfin_write_MDMA3_DEST_CURR_Y_COUNT(val)		bfin_write32(MDMA3_DEST_CURR_Y_COUNT, val)
1298 #define bfin_write_MDMA3_SRC_NEXT_DESC_PTR(val) 	bfin_write32(MDMA3_SRC_NEXT_DESC_PTR, val)
1300 #define bfin_write_MDMA3_SRC_START_ADDR(val) 		bfin_write32(MDMA3_SRC_START_ADDR, val)
1302 #define bfin_write_MDMA3_SRC_CONFIG(val)		bfin_write32(MDMA3_SRC_CONFIG, val)
1304 #define bfin_write_MDMA3_SRC_X_COUNT(val)		bfin_write32(MDMA3_SRC_X_COUNT, val)
1306 #define bfin_write_MDMA3_SRC_X_MODIFY(val) 		bfin_write32(MDMA3_SRC_X_MODIFY, val)
1308 #define bfin_write_MDMA3_SRC_Y_COUNT(val)		bfin_write32(MDMA3_SRC_Y_COUNT, val)
1310 #define bfin_write_MDMA3_SRC_Y_MODIFY(val) 		bfin_write32(MDMA3_SRC_Y_MODIFY, val)
1312 #define bfin_write_MDMA3_SRC_CURR_DESC_PTR(val) 	bfin_write32(MDMA3_SRC_CURR_DESC_PTR, val)
1314 #define bfin_write_MDMA3_SRC_PREV_DESC_PTR(val) 	bfin_write32(MDMA3_SRC_PREV_DESC_PTR, val)
1316 #define bfin_write_MDMA3_SRC_CURR_ADDR(val) 		bfin_write32(MDMA3_SRC_CURR_ADDR, val)
1318 #define bfin_write_MDMA3_SRC_IRQ_STATUS(val)		bfin_write32(MDMA3_SRC_IRQ_STATUS, val)
1320 #define bfin_write_MDMA3_SRC_CURR_X_COUNT(val)		bfin_write32(MDMA3_SRC_CURR_X_COUNT, val)
1322 #define bfin_write_MDMA3_SRC_CURR_Y_COUNT(val)		bfin_write32(MDMA3_SRC_CURR_Y_COUNT, val)
1328 #define bfin_write_DMA29_NEXT_DESC_PTR(val) 	bfin_write32(DMA29_NEXT_DESC_PTR, val)
1330 #define bfin_write_DMA29_START_ADDR(val) 	bfin_write32(DMA29_START_ADDR, val)
1332 #define bfin_write_DMA29_CONFIG(val)		bfin_write32(DMA29_CONFIG, val)
1334 #define bfin_write_DMA29_X_COUNT(val)		bfin_write32(DMA29_X_COUNT, val)
1336 #define bfin_write_DMA29_X_MODIFY(val) 		bfin_write32(DMA29_X_MODIFY, val)
1338 #define bfin_write_DMA29_Y_COUNT(val)		bfin_write32(DMA29_Y_COUNT, val)
1340 #define bfin_write_DMA29_Y_MODIFY(val) 		bfin_write32(DMA29_Y_MODIFY, val)
1342 #define bfin_write_DMA29_CURR_DESC_PTR(val) 	bfin_write32(DMA29_CURR_DESC_PTR, val)
1344 #define bfin_write_DMA29_PREV_DESC_PTR(val) 	bfin_write32(DMA29_PREV_DESC_PTR, val)
1346 #define bfin_write_DMA29_CURR_ADDR(val) 	bfin_write32(DMA29_CURR_ADDR, val)
1348 #define bfin_write_DMA29_IRQ_STATUS(val)	bfin_write32(DMA29_IRQ_STATUS, val)
1350 #define bfin_write_DMA29_CURR_X_COUNT(val)	bfin_write32(DMA29_CURR_X_COUNT, val)
1352 #define bfin_write_DMA29_CURR_Y_COUNT(val)	bfin_write32(DMA29_CURR_Y_COUNT, val)
1354 #define bfin_write_DMA29_BWL_COUNT(val)		bfin_write32(DMA29_BWL_COUNT, val)
1356 #define bfin_write_DMA29_CURR_BWL_COUNT(val)	bfin_write32(DMA29_CURR_BWL_COUNT, val)
1358 #define bfin_write_DMA29_BWM_COUNT(val)		bfin_write32(DMA29_BWM_COUNT, val)
1360 #define bfin_write_DMA29_CURR_BWM_COUNT(val)	bfin_write32(DMA29_CURR_BWM_COUNT, val)
1365 #define bfin_write_DMA30_NEXT_DESC_PTR(val) 	bfin_write32(DMA30_NEXT_DESC_PTR, val)
1367 #define bfin_write_DMA30_START_ADDR(val) 	bfin_write32(DMA30_START_ADDR, val)
1369 #define bfin_write_DMA30_CONFIG(val)		bfin_write32(DMA30_CONFIG, val)
1371 #define bfin_write_DMA30_X_COUNT(val)		bfin_write32(DMA30_X_COUNT, val)
1373 #define bfin_write_DMA30_X_MODIFY(val) 		bfin_write32(DMA30_X_MODIFY, val)
1375 #define bfin_write_DMA30_Y_COUNT(val)		bfin_write32(DMA30_Y_COUNT, val)
1377 #define bfin_write_DMA30_Y_MODIFY(val) 		bfin_write32(DMA30_Y_MODIFY, val)
1379 #define bfin_write_DMA30_CURR_DESC_PTR(val) 	bfin_write32(DMA30_CURR_DESC_PTR, val)
1381 #define bfin_write_DMA30_PREV_DESC_PTR(val) 	bfin_write32(DMA30_PREV_DESC_PTR, val)
1383 #define bfin_write_DMA30_CURR_ADDR(val) 	bfin_write32(DMA30_CURR_ADDR, val)
1385 #define bfin_write_DMA30_IRQ_STATUS(val)	bfin_write32(DMA30_IRQ_STATUS, val)
1387 #define bfin_write_DMA30_CURR_X_COUNT(val)	bfin_write32(DMA30_CURR_X_COUNT, val)
1389 #define bfin_write_DMA30_CURR_Y_COUNT(val)	bfin_write32(DMA30_CURR_Y_COUNT, val)
1391 #define bfin_write_DMA30_BWL_COUNT(val)		bfin_write32(DMA30_BWL_COUNT, val)
1393 #define bfin_write_DMA30_CURR_BWL_COUNT(val)	bfin_write32(DMA30_CURR_BWL_COUNT, val)
1395 #define bfin_write_DMA30_BWM_COUNT(val)		bfin_write32(DMA30_BWM_COUNT, val)
1397 #define bfin_write_DMA30_CURR_BWM_COUNT(val)	bfin_write32(DMA30_CURR_BWM_COUNT, val)
1402 #define bfin_write_DMA31_NEXT_DESC_PTR(val) 	bfin_write32(DMA31_NEXT_DESC_PTR, val)
1404 #define bfin_write_DMA31_START_ADDR(val) 	bfin_write32(DMA31_START_ADDR, val)
1406 #define bfin_write_DMA31_CONFIG(val)		bfin_write32(DMA31_CONFIG, val)
1408 #define bfin_write_DMA31_X_COUNT(val)		bfin_write32(DMA31_X_COUNT, val)
1410 #define bfin_write_DMA31_X_MODIFY(val) 		bfin_write32(DMA31_X_MODIFY, val)
1412 #define bfin_write_DMA31_Y_COUNT(val)		bfin_write32(DMA31_Y_COUNT, val)
1414 #define bfin_write_DMA31_Y_MODIFY(val) 		bfin_write32(DMA31_Y_MODIFY, val)
1416 #define bfin_write_DMA31_CURR_DESC_PTR(val) 	bfin_write32(DMA31_CURR_DESC_PTR, val)
1418 #define bfin_write_DMA31_PREV_DESC_PTR(val) 	bfin_write32(DMA31_PREV_DESC_PTR, val)
1420 #define bfin_write_DMA31_CURR_ADDR(val) 	bfin_write32(DMA31_CURR_ADDR, val)
1422 #define bfin_write_DMA31_IRQ_STATUS(val)	bfin_write32(DMA31_IRQ_STATUS, val)
1424 #define bfin_write_DMA31_CURR_X_COUNT(val)	bfin_write32(DMA31_CURR_X_COUNT, val)
1426 #define bfin_write_DMA31_CURR_Y_COUNT(val)	bfin_write32(DMA31_CURR_Y_COUNT, val)
1428 #define bfin_write_DMA31_BWL_COUNT(val)		bfin_write32(DMA31_BWL_COUNT, val)
1430 #define bfin_write_DMA31_CURR_BWL_COUNT(val)	bfin_write32(DMA31_CURR_BWL_COUNT, val)
1432 #define bfin_write_DMA31_BWM_COUNT(val)		bfin_write32(DMA31_BWM_COUNT, val)
1434 #define bfin_write_DMA31_CURR_BWM_COUNT(val)	bfin_write32(DMA31_CURR_BWM_COUNT, val)
1439 #define bfin_write_DMA32_NEXT_DESC_PTR(val) 	bfin_write32(DMA32_NEXT_DESC_PTR, val)
1441 #define bfin_write_DMA32_START_ADDR(val) 	bfin_write32(DMA32_START_ADDR, val)
1443 #define bfin_write_DMA32_CONFIG(val)		bfin_write32(DMA32_CONFIG, val)
1445 #define bfin_write_DMA32_X_COUNT(val)		bfin_write32(DMA32_X_COUNT, val)
1447 #define bfin_write_DMA32_X_MODIFY(val) 		bfin_write32(DMA32_X_MODIFY, val)
1449 #define bfin_write_DMA32_Y_COUNT(val)		bfin_write32(DMA32_Y_COUNT, val)
1451 #define bfin_write_DMA32_Y_MODIFY(val) 		bfin_write32(DMA32_Y_MODIFY, val)
1453 #define bfin_write_DMA32_CURR_DESC_PTR(val) 	bfin_write32(DMA32_CURR_DESC_PTR, val)
1455 #define bfin_write_DMA32_PREV_DESC_PTR(val) 	bfin_write32(DMA32_PREV_DESC_PTR, val)
1457 #define bfin_write_DMA32_CURR_ADDR(val) 	bfin_write32(DMA32_CURR_ADDR, val)
1459 #define bfin_write_DMA32_IRQ_STATUS(val)	bfin_write32(DMA32_IRQ_STATUS, val)
1461 #define bfin_write_DMA32_CURR_X_COUNT(val)	bfin_write32(DMA32_CURR_X_COUNT, val)
1463 #define bfin_write_DMA32_CURR_Y_COUNT(val)	bfin_write32(DMA32_CURR_Y_COUNT, val)
1465 #define bfin_write_DMA32_BWL_COUNT(val)		bfin_write32(DMA32_BWL_COUNT, val)
1467 #define bfin_write_DMA32_CURR_BWL_COUNT(val)	bfin_write32(DMA32_CURR_BWL_COUNT, val)
1469 #define bfin_write_DMA32_BWM_COUNT(val)		bfin_write32(DMA32_BWM_COUNT, val)
1471 #define bfin_write_DMA32_CURR_BWM_COUNT(val)	bfin_write32(DMA32_CURR_BWM_COUNT, val)
1476 #define bfin_write_DMA33_NEXT_DESC_PTR(val) 	bfin_write32(DMA33_NEXT_DESC_PTR, val)
1478 #define bfin_write_DMA33_START_ADDR(val) 	bfin_write32(DMA33_START_ADDR, val)
1480 #define bfin_write_DMA33_CONFIG(val)		bfin_write32(DMA33_CONFIG, val)
1482 #define bfin_write_DMA33_X_COUNT(val)		bfin_write32(DMA33_X_COUNT, val)
1484 #define bfin_write_DMA33_X_MODIFY(val) 		bfin_write32(DMA33_X_MODIFY, val)
1486 #define bfin_write_DMA33_Y_COUNT(val)		bfin_write32(DMA33_Y_COUNT, val)
1488 #define bfin_write_DMA33_Y_MODIFY(val) 		bfin_write32(DMA33_Y_MODIFY, val)
1490 #define bfin_write_DMA33_CURR_DESC_PTR(val) 	bfin_write32(DMA33_CURR_DESC_PTR, val)
1492 #define bfin_write_DMA33_PREV_DESC_PTR(val) 	bfin_write32(DMA33_PREV_DESC_PTR, val)
1494 #define bfin_write_DMA33_CURR_ADDR(val) 	bfin_write32(DMA33_CURR_ADDR, val)
1496 #define bfin_write_DMA33_IRQ_STATUS(val)	bfin_write32(DMA33_IRQ_STATUS, val)
1498 #define bfin_write_DMA33_CURR_X_COUNT(val)	bfin_write32(DMA33_CURR_X_COUNT, val)
1500 #define bfin_write_DMA33_CURR_Y_COUNT(val)	bfin_write32(DMA33_CURR_Y_COUNT, val)
1502 #define bfin_write_DMA33_BWL_COUNT(val)		bfin_write32(DMA33_BWL_COUNT, val)
1504 #define bfin_write_DMA33_CURR_BWL_COUNT(val)	bfin_write32(DMA33_CURR_BWL_COUNT, val)
1506 #define bfin_write_DMA33_BWM_COUNT(val)		bfin_write32(DMA33_BWM_COUNT, val)
1508 #define bfin_write_DMA33_CURR_BWM_COUNT(val)	bfin_write32(DMA33_CURR_BWM_COUNT, val)
1513 #define bfin_write_DMA34_NEXT_DESC_PTR(val) 	bfin_write32(DMA34_NEXT_DESC_PTR, val)
1515 #define bfin_write_DMA34_START_ADDR(val) 	bfin_write32(DMA34_START_ADDR, val)
1517 #define bfin_write_DMA34_CONFIG(val)		bfin_write32(DMA34_CONFIG, val)
1519 #define bfin_write_DMA34_X_COUNT(val)		bfin_write32(DMA34_X_COUNT, val)
1521 #define bfin_write_DMA34_X_MODIFY(val) 		bfin_write32(DMA34_X_MODIFY, val)
1523 #define bfin_write_DMA34_Y_COUNT(val)		bfin_write32(DMA34_Y_COUNT, val)
1525 #define bfin_write_DMA34_Y_MODIFY(val) 		bfin_write32(DMA34_Y_MODIFY, val)
1527 #define bfin_write_DMA34_CURR_DESC_PTR(val) 	bfin_write32(DMA34_CURR_DESC_PTR, val)
1529 #define bfin_write_DMA34_PREV_DESC_PTR(val) 	bfin_write32(DMA34_PREV_DESC_PTR, val)
1531 #define bfin_write_DMA34_CURR_ADDR(val) 	bfin_write32(DMA34_CURR_ADDR, val)
1533 #define bfin_write_DMA34_IRQ_STATUS(val)	bfin_write32(DMA34_IRQ_STATUS, val)
1535 #define bfin_write_DMA34_CURR_X_COUNT(val)	bfin_write32(DMA34_CURR_X_COUNT, val)
1537 #define bfin_write_DMA34_CURR_Y_COUNT(val)	bfin_write32(DMA34_CURR_Y_COUNT, val)
1539 #define bfin_write_DMA34_BWL_COUNT(val)		bfin_write32(DMA34_BWL_COUNT, val)
1541 #define bfin_write_DMA34_CURR_BWL_COUNT(val)	bfin_write32(DMA34_CURR_BWL_COUNT, val)
1543 #define bfin_write_DMA34_BWM_COUNT(val)		bfin_write32(DMA34_BWM_COUNT, val)
1545 #define bfin_write_DMA34_CURR_BWM_COUNT(val)	bfin_write32(DMA34_CURR_BWM_COUNT, val)
1550 #define bfin_write_DMA35_NEXT_DESC_PTR(val) 	bfin_write32(DMA35_NEXT_DESC_PTR, val)
1552 #define bfin_write_DMA35_START_ADDR(val) 	bfin_write32(DMA35_START_ADDR, val)
1554 #define bfin_write_DMA35_CONFIG(val)		bfin_write32(DMA35_CONFIG, val)
1556 #define bfin_write_DMA35_X_COUNT(val)		bfin_write32(DMA35_X_COUNT, val)
1558 #define bfin_write_DMA35_X_MODIFY(val) 		bfin_write32(DMA35_X_MODIFY, val)
1560 #define bfin_write_DMA35_Y_COUNT(val)		bfin_write32(DMA35_Y_COUNT, val)
1562 #define bfin_write_DMA35_Y_MODIFY(val) 		bfin_write32(DMA35_Y_MODIFY, val)
1564 #define bfin_write_DMA35_CURR_DESC_PTR(val) 	bfin_write32(DMA35_CURR_DESC_PTR, val)
1566 #define bfin_write_DMA35_PREV_DESC_PTR(val) 	bfin_write32(DMA35_PREV_DESC_PTR, val)
1568 #define bfin_write_DMA35_CURR_ADDR(val) 	bfin_write32(DMA35_CURR_ADDR, val)
1570 #define bfin_write_DMA35_IRQ_STATUS(val)	bfin_write32(DMA35_IRQ_STATUS, val)
1572 #define bfin_write_DMA35_CURR_X_COUNT(val)	bfin_write32(DMA35_CURR_X_COUNT, val)
1574 #define bfin_write_DMA35_CURR_Y_COUNT(val)	bfin_write32(DMA35_CURR_Y_COUNT, val)
1576 #define bfin_write_DMA35_BWL_COUNT(val)		bfin_write32(DMA35_BWL_COUNT, val)
1578 #define bfin_write_DMA35_CURR_BWL_COUNT(val)	bfin_write32(DMA35_CURR_BWL_COUNT, val)
1580 #define bfin_write_DMA35_BWM_COUNT(val)		bfin_write32(DMA35_BWM_COUNT, val)
1582 #define bfin_write_DMA35_CURR_BWM_COUNT(val)	bfin_write32(DMA35_CURR_BWM_COUNT, val)
1587 #define bfin_write_DMA36_NEXT_DESC_PTR(val) 	bfin_write32(DMA36_NEXT_DESC_PTR, val)
1589 #define bfin_write_DMA36_START_ADDR(val) 	bfin_write32(DMA36_START_ADDR, val)
1591 #define bfin_write_DMA36_CONFIG(val)		bfin_write32(DMA36_CONFIG, val)
1593 #define bfin_write_DMA36_X_COUNT(val)		bfin_write32(DMA36_X_COUNT, val)
1595 #define bfin_write_DMA36_X_MODIFY(val) 		bfin_write32(DMA36_X_MODIFY, val)
1597 #define bfin_write_DMA36_Y_COUNT(val)		bfin_write32(DMA36_Y_COUNT, val)
1599 #define bfin_write_DMA36_Y_MODIFY(val) 		bfin_write32(DMA36_Y_MODIFY, val)
1601 #define bfin_write_DMA36_CURR_DESC_PTR(val) 	bfin_write32(DMA36_CURR_DESC_PTR, val)
1603 #define bfin_write_DMA36_PREV_DESC_PTR(val) 	bfin_write32(DMA36_PREV_DESC_PTR, val)
1605 #define bfin_write_DMA36_CURR_ADDR(val) 	bfin_write32(DMA36_CURR_ADDR, val)
1607 #define bfin_write_DMA36_IRQ_STATUS(val)	bfin_write32(DMA36_IRQ_STATUS, val)
1609 #define bfin_write_DMA36_CURR_X_COUNT(val)	bfin_write32(DMA36_CURR_X_COUNT, val)
1611 #define bfin_write_DMA36_CURR_Y_COUNT(val)	bfin_write32(DMA36_CURR_Y_COUNT, val)
1613 #define bfin_write_DMA36_BWL_COUNT(val)		bfin_write32(DMA36_BWL_COUNT, val)
1615 #define bfin_write_DMA36_CURR_BWL_COUNT(val)	bfin_write32(DMA36_CURR_BWL_COUNT, val)
1617 #define bfin_write_DMA36_BWM_COUNT(val)		bfin_write32(DMA36_BWM_COUNT, val)
1619 #define bfin_write_DMA36_CURR_BWM_COUNT(val)	bfin_write32(DMA36_CURR_BWM_COUNT, val)
1624 #define bfin_write_DMA37_NEXT_DESC_PTR(val) 	bfin_write32(DMA37_NEXT_DESC_PTR, val)
1626 #define bfin_write_DMA37_START_ADDR(val) 	bfin_write32(DMA37_START_ADDR, val)
1628 #define bfin_write_DMA37_CONFIG(val)		bfin_write32(DMA37_CONFIG, val)
1630 #define bfin_write_DMA37_X_COUNT(val)		bfin_write32(DMA37_X_COUNT, val)
1632 #define bfin_write_DMA37_X_MODIFY(val) 		bfin_write32(DMA37_X_MODIFY, val)
1634 #define bfin_write_DMA37_Y_COUNT(val)		bfin_write32(DMA37_Y_COUNT, val)
1636 #define bfin_write_DMA37_Y_MODIFY(val) 		bfin_write32(DMA37_Y_MODIFY, val)
1638 #define bfin_write_DMA37_CURR_DESC_PTR(val) 	bfin_write32(DMA37_CURR_DESC_PTR, val)
1640 #define bfin_write_DMA37_PREV_DESC_PTR(val) 	bfin_write32(DMA37_PREV_DESC_PTR, val)
1642 #define bfin_write_DMA37_CURR_ADDR(val) 	bfin_write32(DMA37_CURR_ADDR, val)
1644 #define bfin_write_DMA37_IRQ_STATUS(val)	bfin_write32(DMA37_IRQ_STATUS, val)
1646 #define bfin_write_DMA37_CURR_X_COUNT(val)	bfin_write32(DMA37_CURR_X_COUNT, val)
1648 #define bfin_write_DMA37_CURR_Y_COUNT(val)	bfin_write32(DMA37_CURR_Y_COUNT, val)
1650 #define bfin_write_DMA37_BWL_COUNT(val)		bfin_write32(DMA37_BWL_COUNT, val)
1652 #define bfin_write_DMA37_CURR_BWL_COUNT(val)	bfin_write32(DMA37_CURR_BWL_COUNT, val)
1654 #define bfin_write_DMA37_BWM_COUNT(val)		bfin_write32(DMA37_BWM_COUNT, val)
1656 #define bfin_write_DMA37_CURR_BWM_COUNT(val)	bfin_write32(DMA37_CURR_BWM_COUNT, val)
1661 #define bfin_write_DMA38_NEXT_DESC_PTR(val) 	bfin_write32(DMA38_NEXT_DESC_PTR, val)
1663 #define bfin_write_DMA38_START_ADDR(val) 	bfin_write32(DMA38_START_ADDR, val)
1665 #define bfin_write_DMA38_CONFIG(val)		bfin_write32(DMA38_CONFIG, val)
1667 #define bfin_write_DMA38_X_COUNT(val)		bfin_write32(DMA38_X_COUNT, val)
1669 #define bfin_write_DMA38_X_MODIFY(val) 		bfin_write32(DMA38_X_MODIFY, val)
1671 #define bfin_write_DMA38_Y_COUNT(val)		bfin_write32(DMA38_Y_COUNT, val)
1673 #define bfin_write_DMA38_Y_MODIFY(val) 		bfin_write32(DMA38_Y_MODIFY, val)
1675 #define bfin_write_DMA38_CURR_DESC_PTR(val) 	bfin_write32(DMA38_CURR_DESC_PTR, val)
1677 #define bfin_write_DMA38_PREV_DESC_PTR(val) 	bfin_write32(DMA38_PREV_DESC_PTR, val)
1679 #define bfin_write_DMA38_CURR_ADDR(val) 	bfin_write32(DMA38_CURR_ADDR, val)
1681 #define bfin_write_DMA38_IRQ_STATUS(val)	bfin_write32(DMA38_IRQ_STATUS, val)
1683 #define bfin_write_DMA38_CURR_X_COUNT(val)	bfin_write32(DMA38_CURR_X_COUNT, val)
1685 #define bfin_write_DMA38_CURR_Y_COUNT(val)	bfin_write32(DMA38_CURR_Y_COUNT, val)
1687 #define bfin_write_DMA38_BWL_COUNT(val)		bfin_write32(DMA38_BWL_COUNT, val)
1689 #define bfin_write_DMA38_CURR_BWL_COUNT(val)	bfin_write32(DMA38_CURR_BWL_COUNT, val)
1691 #define bfin_write_DMA38_BWM_COUNT(val)		bfin_write32(DMA38_BWM_COUNT, val)
1693 #define bfin_write_DMA38_CURR_BWM_COUNT(val)	bfin_write32(DMA38_CURR_BWM_COUNT, val)
1698 #define bfin_write_DMA39_NEXT_DESC_PTR(val) 	bfin_write32(DMA39_NEXT_DESC_PTR, val)
1700 #define bfin_write_DMA39_START_ADDR(val) 	bfin_write32(DMA39_START_ADDR, val)
1702 #define bfin_write_DMA39_CONFIG(val)		bfin_write32(DMA39_CONFIG, val)
1704 #define bfin_write_DMA39_X_COUNT(val)		bfin_write32(DMA39_X_COUNT, val)
1706 #define bfin_write_DMA39_X_MODIFY(val) 		bfin_write32(DMA39_X_MODIFY, val)
1708 #define bfin_write_DMA39_Y_COUNT(val)		bfin_write32(DMA39_Y_COUNT, val)
1710 #define bfin_write_DMA39_Y_MODIFY(val) 		bfin_write32(DMA39_Y_MODIFY, val)
1712 #define bfin_write_DMA39_CURR_DESC_PTR(val) 	bfin_write32(DMA39_CURR_DESC_PTR, val)
1714 #define bfin_write_DMA39_PREV_DESC_PTR(val) 	bfin_write32(DMA39_PREV_DESC_PTR, val)
1716 #define bfin_write_DMA39_CURR_ADDR(val) 	bfin_write32(DMA39_CURR_ADDR, val)
1718 #define bfin_write_DMA39_IRQ_STATUS(val)	bfin_write32(DMA39_IRQ_STATUS, val)
1720 #define bfin_write_DMA39_CURR_X_COUNT(val)	bfin_write32(DMA39_CURR_X_COUNT, val)
1722 #define bfin_write_DMA39_CURR_Y_COUNT(val)	bfin_write32(DMA39_CURR_Y_COUNT, val)
1724 #define bfin_write_DMA39_BWL_COUNT(val)		bfin_write32(DMA39_BWL_COUNT, val)
1726 #define bfin_write_DMA39_CURR_BWL_COUNT(val)	bfin_write32(DMA39_CURR_BWL_COUNT, val)
1728 #define bfin_write_DMA39_BWM_COUNT(val)		bfin_write32(DMA39_BWM_COUNT, val)
1730 #define bfin_write_DMA39_CURR_BWM_COUNT(val)	bfin_write32(DMA39_CURR_BWM_COUNT, val)
1735 #define bfin_write_DMA40_NEXT_DESC_PTR(val) 	bfin_write32(DMA40_NEXT_DESC_PTR, val)
1737 #define bfin_write_DMA40_START_ADDR(val) 	bfin_write32(DMA40_START_ADDR, val)
1739 #define bfin_write_DMA40_CONFIG(val)		bfin_write32(DMA40_CONFIG, val)
1741 #define bfin_write_DMA40_X_COUNT(val)		bfin_write32(DMA40_X_COUNT, val)
1743 #define bfin_write_DMA40_X_MODIFY(val) 		bfin_write32(DMA40_X_MODIFY, val)
1745 #define bfin_write_DMA40_Y_COUNT(val)		bfin_write32(DMA40_Y_COUNT, val)
1747 #define bfin_write_DMA40_Y_MODIFY(val) 		bfin_write32(DMA40_Y_MODIFY, val)
1749 #define bfin_write_DMA40_CURR_DESC_PTR(val) 	bfin_write32(DMA40_CURR_DESC_PTR, val)
1751 #define bfin_write_DMA40_PREV_DESC_PTR(val) 	bfin_write32(DMA40_PREV_DESC_PTR, val)
1753 #define bfin_write_DMA40_CURR_ADDR(val) 	bfin_write32(DMA40_CURR_ADDR, val)
1755 #define bfin_write_DMA40_IRQ_STATUS(val)	bfin_write32(DMA40_IRQ_STATUS, val)
1757 #define bfin_write_DMA40_CURR_X_COUNT(val)	bfin_write32(DMA40_CURR_X_COUNT, val)
1759 #define bfin_write_DMA40_CURR_Y_COUNT(val)	bfin_write32(DMA40_CURR_Y_COUNT, val)
1761 #define bfin_write_DMA40_BWL_COUNT(val)		bfin_write32(DMA40_BWL_COUNT, val)
1763 #define bfin_write_DMA40_CURR_BWL_COUNT(val)	bfin_write32(DMA40_CURR_BWL_COUNT, val)
1765 #define bfin_write_DMA40_BWM_COUNT(val)		bfin_write32(DMA40_BWM_COUNT, val)
1767 #define bfin_write_DMA40_CURR_BWM_COUNT(val)	bfin_write32(DMA40_CURR_BWM_COUNT, val)
1772 #define bfin_write_DMA41_NEXT_DESC_PTR(val) 	bfin_write32(DMA41_NEXT_DESC_PTR, val)
1774 #define bfin_write_DMA41_START_ADDR(val) 	bfin_write32(DMA41_START_ADDR, val)
1776 #define bfin_write_DMA41_CONFIG(val)		bfin_write32(DMA41_CONFIG, val)
1778 #define bfin_write_DMA41_X_COUNT(val)		bfin_write32(DMA41_X_COUNT, val)
1780 #define bfin_write_DMA41_X_MODIFY(val) 		bfin_write32(DMA41_X_MODIFY, val)
1782 #define bfin_write_DMA41_Y_COUNT(val)		bfin_write32(DMA41_Y_COUNT, val)
1784 #define bfin_write_DMA41_Y_MODIFY(val) 		bfin_write32(DMA41_Y_MODIFY, val)
1786 #define bfin_write_DMA41_CURR_DESC_PTR(val) 	bfin_write32(DMA41_CURR_DESC_PTR, val)
1788 #define bfin_write_DMA41_PREV_DESC_PTR(val) 	bfin_write32(DMA41_PREV_DESC_PTR, val)
1790 #define bfin_write_DMA41_CURR_ADDR(val) 	bfin_write32(DMA41_CURR_ADDR, val)
1792 #define bfin_write_DMA41_IRQ_STATUS(val)	bfin_write32(DMA41_IRQ_STATUS, val)
1794 #define bfin_write_DMA41_CURR_X_COUNT(val)	bfin_write32(DMA41_CURR_X_COUNT, val)
1796 #define bfin_write_DMA41_CURR_Y_COUNT(val)	bfin_write32(DMA41_CURR_Y_COUNT, val)
1798 #define bfin_write_DMA41_BWL_COUNT(val)		bfin_write32(DMA41_BWL_COUNT, val)
1800 #define bfin_write_DMA41_CURR_BWL_COUNT(val)	bfin_write32(DMA41_CURR_BWL_COUNT, val)
1802 #define bfin_write_DMA41_BWM_COUNT(val)		bfin_write32(DMA41_BWM_COUNT, val)
1804 #define bfin_write_DMA41_CURR_BWM_COUNT(val)	bfin_write32(DMA41_CURR_BWM_COUNT, val)
1809 #define bfin_write_DMA42_NEXT_DESC_PTR(val) 	bfin_write32(DMA42_NEXT_DESC_PTR, val)
1811 #define bfin_write_DMA42_START_ADDR(val) 	bfin_write32(DMA42_START_ADDR, val)
1813 #define bfin_write_DMA42_CONFIG(val)		bfin_write32(DMA42_CONFIG, val)
1815 #define bfin_write_DMA42_X_COUNT(val)		bfin_write32(DMA42_X_COUNT, val)
1817 #define bfin_write_DMA42_X_MODIFY(val) 		bfin_write32(DMA42_X_MODIFY, val)
1819 #define bfin_write_DMA42_Y_COUNT(val)		bfin_write32(DMA42_Y_COUNT, val)
1821 #define bfin_write_DMA42_Y_MODIFY(val) 		bfin_write32(DMA42_Y_MODIFY, val)
1823 #define bfin_write_DMA42_CURR_DESC_PTR(val) 	bfin_write32(DMA42_CURR_DESC_PTR, val)
1825 #define bfin_write_DMA42_PREV_DESC_PTR(val) 	bfin_write32(DMA42_PREV_DESC_PTR, val)
1827 #define bfin_write_DMA42_CURR_ADDR(val) 	bfin_write32(DMA42_CURR_ADDR, val)
1829 #define bfin_write_DMA42_IRQ_STATUS(val)	bfin_write32(DMA42_IRQ_STATUS, val)
1831 #define bfin_write_DMA42_CURR_X_COUNT(val)	bfin_write32(DMA42_CURR_X_COUNT, val)
1833 #define bfin_write_DMA42_CURR_Y_COUNT(val)	bfin_write32(DMA42_CURR_Y_COUNT, val)
1835 #define bfin_write_DMA42_BWL_COUNT(val)		bfin_write32(DMA42_BWL_COUNT, val)
1837 #define bfin_write_DMA42_CURR_BWL_COUNT(val)	bfin_write32(DMA42_CURR_BWL_COUNT, val)
1839 #define bfin_write_DMA42_BWM_COUNT(val)		bfin_write32(DMA42_BWM_COUNT, val)
1841 #define bfin_write_DMA42_CURR_BWM_COUNT(val)	bfin_write32(DMA42_CURR_BWM_COUNT, val)
1846 #define bfin_write_DMA43_NEXT_DESC_PTR(val) 	bfin_write32(DMA43_NEXT_DESC_PTR, val)
1848 #define bfin_write_DMA43_START_ADDR(val) 	bfin_write32(DMA43_START_ADDR, val)
1850 #define bfin_write_DMA43_CONFIG(val)		bfin_write32(DMA43_CONFIG, val)
1852 #define bfin_write_DMA43_X_COUNT(val)		bfin_write32(DMA43_X_COUNT, val)
1854 #define bfin_write_DMA43_X_MODIFY(val) 		bfin_write32(DMA43_X_MODIFY, val)
1856 #define bfin_write_DMA43_Y_COUNT(val)		bfin_write32(DMA43_Y_COUNT, val)
1858 #define bfin_write_DMA43_Y_MODIFY(val) 		bfin_write32(DMA43_Y_MODIFY, val)
1860 #define bfin_write_DMA43_CURR_DESC_PTR(val) 	bfin_write32(DMA43_CURR_DESC_PTR, val)
1862 #define bfin_write_DMA43_PREV_DESC_PTR(val) 	bfin_write32(DMA43_PREV_DESC_PTR, val)
1864 #define bfin_write_DMA43_CURR_ADDR(val) 	bfin_write32(DMA43_CURR_ADDR, val)
1866 #define bfin_write_DMA43_IRQ_STATUS(val)	bfin_write32(DMA43_IRQ_STATUS, val)
1868 #define bfin_write_DMA43_CURR_X_COUNT(val)	bfin_write32(DMA43_CURR_X_COUNT, val)
1870 #define bfin_write_DMA43_CURR_Y_COUNT(val)	bfin_write32(DMA43_CURR_Y_COUNT, val)
1872 #define bfin_write_DMA43_BWL_COUNT(val)		bfin_write32(DMA43_BWL_COUNT, val)
1874 #define bfin_write_DMA43_CURR_BWL_COUNT(val)	bfin_write32(DMA43_CURR_BWL_COUNT, val)
1876 #define bfin_write_DMA43_BWM_COUNT(val)		bfin_write32(DMA43_BWM_COUNT, val)
1878 #define bfin_write_DMA43_CURR_BWM_COUNT(val)	bfin_write32(DMA43_CURR_BWM_COUNT, val)
1883 #define bfin_write_DMA44_NEXT_DESC_PTR(val) 	bfin_write32(DMA44_NEXT_DESC_PTR, val)
1885 #define bfin_write_DMA44_START_ADDR(val) 	bfin_write32(DMA44_START_ADDR, val)
1887 #define bfin_write_DMA44_CONFIG(val)		bfin_write32(DMA44_CONFIG, val)
1889 #define bfin_write_DMA44_X_COUNT(val)		bfin_write32(DMA44_X_COUNT, val)
1891 #define bfin_write_DMA44_X_MODIFY(val) 		bfin_write32(DMA44_X_MODIFY, val)
1893 #define bfin_write_DMA44_Y_COUNT(val)		bfin_write32(DMA44_Y_COUNT, val)
1895 #define bfin_write_DMA44_Y_MODIFY(val) 		bfin_write32(DMA44_Y_MODIFY, val)
1897 #define bfin_write_DMA44_CURR_DESC_PTR(val) 	bfin_write32(DMA44_CURR_DESC_PTR, val)
1899 #define bfin_write_DMA44_PREV_DESC_PTR(val) 	bfin_write32(DMA44_PREV_DESC_PTR, val)
1901 #define bfin_write_DMA44_CURR_ADDR(val) 	bfin_write32(DMA44_CURR_ADDR, val)
1903 #define bfin_write_DMA44_IRQ_STATUS(val)	bfin_write32(DMA44_IRQ_STATUS, val)
1905 #define bfin_write_DMA44_CURR_X_COUNT(val)	bfin_write32(DMA44_CURR_X_COUNT, val)
1907 #define bfin_write_DMA44_CURR_Y_COUNT(val)	bfin_write32(DMA44_CURR_Y_COUNT, val)
1909 #define bfin_write_DMA44_BWL_COUNT(val)		bfin_write32(DMA44_BWL_COUNT, val)
1911 #define bfin_write_DMA44_CURR_BWL_COUNT(val)	bfin_write32(DMA44_CURR_BWL_COUNT, val)
1913 #define bfin_write_DMA44_BWM_COUNT(val)		bfin_write32(DMA44_BWM_COUNT, val)
1915 #define bfin_write_DMA44_CURR_BWM_COUNT(val)	bfin_write32(DMA44_CURR_BWM_COUNT, val)
1920 #define bfin_write_DMA45_NEXT_DESC_PTR(val) 	bfin_write32(DMA45_NEXT_DESC_PTR, val)
1922 #define bfin_write_DMA45_START_ADDR(val) 	bfin_write32(DMA45_START_ADDR, val)
1924 #define bfin_write_DMA45_CONFIG(val)		bfin_write32(DMA45_CONFIG, val)
1926 #define bfin_write_DMA45_X_COUNT(val)		bfin_write32(DMA45_X_COUNT, val)
1928 #define bfin_write_DMA45_X_MODIFY(val) 		bfin_write32(DMA45_X_MODIFY, val)
1930 #define bfin_write_DMA45_Y_COUNT(val)		bfin_write32(DMA45_Y_COUNT, val)
1932 #define bfin_write_DMA45_Y_MODIFY(val) 		bfin_write32(DMA45_Y_MODIFY, val)
1934 #define bfin_write_DMA45_CURR_DESC_PTR(val) 	bfin_write32(DMA45_CURR_DESC_PTR, val)
1936 #define bfin_write_DMA45_PREV_DESC_PTR(val) 	bfin_write32(DMA45_PREV_DESC_PTR, val)
1938 #define bfin_write_DMA45_CURR_ADDR(val) 	bfin_write32(DMA45_CURR_ADDR, val)
1940 #define bfin_write_DMA45_IRQ_STATUS(val)	bfin_write32(DMA45_IRQ_STATUS, val)
1942 #define bfin_write_DMA45_CURR_X_COUNT(val)	bfin_write32(DMA45_CURR_X_COUNT, val)
1944 #define bfin_write_DMA45_CURR_Y_COUNT(val)	bfin_write32(DMA45_CURR_Y_COUNT, val)
1946 #define bfin_write_DMA45_BWL_COUNT(val)		bfin_write32(DMA45_BWL_COUNT, val)
1948 #define bfin_write_DMA45_CURR_BWL_COUNT(val)	bfin_write32(DMA45_CURR_BWL_COUNT, val)
1950 #define bfin_write_DMA45_BWM_COUNT(val)		bfin_write32(DMA45_BWM_COUNT, val)
1952 #define bfin_write_DMA45_CURR_BWM_COUNT(val)	bfin_write32(DMA45_CURR_BWM_COUNT, val)
1957 #define bfin_write_DMA46_NEXT_DESC_PTR(val) 	bfin_write32(DMA46_NEXT_DESC_PTR, val)
1959 #define bfin_write_DMA46_START_ADDR(val) 	bfin_write32(DMA46_START_ADDR, val)
1961 #define bfin_write_DMA46_CONFIG(val)		bfin_write32(DMA46_CONFIG, val)
1963 #define bfin_write_DMA46_X_COUNT(val)		bfin_write32(DMA46_X_COUNT, val)
1965 #define bfin_write_DMA46_X_MODIFY(val) 		bfin_write32(DMA46_X_MODIFY, val)
1967 #define bfin_write_DMA46_Y_COUNT(val)		bfin_write32(DMA46_Y_COUNT, val)
1969 #define bfin_write_DMA46_Y_MODIFY(val) 		bfin_write32(DMA46_Y_MODIFY, val)
1971 #define bfin_write_DMA46_CURR_DESC_PTR(val) 	bfin_write32(DMA46_CURR_DESC_PTR, val)
1973 #define bfin_write_DMA46_PREV_DESC_PTR(val) 	bfin_write32(DMA46_PREV_DESC_PTR, val)
1975 #define bfin_write_DMA46_CURR_ADDR(val) 	bfin_write32(DMA46_CURR_ADDR, val)
1977 #define bfin_write_DMA46_IRQ_STATUS(val)	bfin_write32(DMA46_IRQ_STATUS, val)
1979 #define bfin_write_DMA46_CURR_X_COUNT(val)	bfin_write32(DMA46_CURR_X_COUNT, val)
1981 #define bfin_write_DMA46_CURR_Y_COUNT(val)	bfin_write32(DMA46_CURR_Y_COUNT, val)
1983 #define bfin_write_DMA46_BWL_COUNT(val)		bfin_write32(DMA46_BWL_COUNT, val)
1985 #define bfin_write_DMA46_CURR_BWL_COUNT(val)	bfin_write32(DMA46_CURR_BWL_COUNT, val)
1987 #define bfin_write_DMA46_BWM_COUNT(val)		bfin_write32(DMA46_BWM_COUNT, val)
1989 #define bfin_write_DMA46_CURR_BWM_COUNT(val)	bfin_write32(DMA46_CURR_BWM_COUNT, val)
1998 #define bfin_write_PINT0_MASK_SET(val)		bfin_write32(PINT0_MASK_SET, val)
2000 #define bfin_write_PINT0_MASK_CLEAR(val)	bfin_write32(PINT0_MASK_CLEAR, val)
2002 #define bfin_write_PINT0_REQUEST(val)		bfin_write32(PINT0_REQUEST, val)
2004 #define bfin_write_PINT0_ASSIGN(val)		bfin_write32(PINT0_ASSIGN, val)
2006 #define bfin_write_PINT0_EDGE_SET(val)		bfin_write32(PINT0_EDGE_SET, val)
2008 #define bfin_write_PINT0_EDGE_CLEAR(val)	bfin_write32(PINT0_EDGE_CLEAR, val)
2010 #define bfin_write_PINT0_INVERT_SET(val)	bfin_write32(PINT0_INVERT_SET, val)
2012 #define bfin_write_PINT0_INVERT_CLEAR(val)	bfin_write32(PINT0_INVERT_CLEAR, val)
2014 #define bfin_write_PINT0_PINSTATE(val)		bfin_write32(PINT0_PINSTATE, val)
2016 #define bfin_write_PINT0_LATCH(val)		bfin_write32(PINT0_LATCH, val)
2021 #define bfin_write_PINT1_MASK_SET(val)		bfin_write32(PINT1_MASK_SET, val)
2023 #define bfin_write_PINT1_MASK_CLEAR(val)	bfin_write32(PINT1_MASK_CLEAR, val)
2025 #define bfin_write_PINT1_REQUEST(val)		bfin_write32(PINT1_REQUEST, val)
2027 #define bfin_write_PINT1_ASSIGN(val)		bfin_write32(PINT1_ASSIGN, val)
2029 #define bfin_write_PINT1_EDGE_SET(val)		bfin_write32(PINT1_EDGE_SET, val)
2031 #define bfin_write_PINT1_EDGE_CLEAR(val)	bfin_write32(PINT1_EDGE_CLEAR, val)
2033 #define bfin_write_PINT1_INVERT_SET(val)	bfin_write32(PINT1_INVERT_SET, val)
2035 #define bfin_write_PINT1_INVERT_CLEAR(val)	bfin_write32(PINT1_INVERT_CLEAR, val)
2037 #define bfin_write_PINT1_PINSTATE(val)		bfin_write32(PINT1_PINSTATE, val)
2039 #define bfin_write_PINT1_LATCH(val)		bfin_write32(PINT1_LATCH, val)
2044 #define bfin_write_PINT2_MASK_SET(val)		bfin_write32(PINT2_MASK_SET, val)
2046 #define bfin_write_PINT2_MASK_CLEAR(val)	bfin_write32(PINT2_MASK_CLEAR, val)
2048 #define bfin_write_PINT2_REQUEST(val)		bfin_write32(PINT2_REQUEST, val)
2050 #define bfin_write_PINT2_ASSIGN(val)		bfin_write32(PINT2_ASSIGN, val)
2052 #define bfin_write_PINT2_EDGE_SET(val)		bfin_write32(PINT2_EDGE_SET, val)
2054 #define bfin_write_PINT2_EDGE_CLEAR(val)	bfin_write32(PINT2_EDGE_CLEAR, val)
2056 #define bfin_write_PINT2_INVERT_SET(val)	bfin_write32(PINT2_INVERT_SET, val)
2058 #define bfin_write_PINT2_INVERT_CLEAR(val)	bfin_write32(PINT2_INVERT_CLEAR, val)
2060 #define bfin_write_PINT2_PINSTATE(val)		bfin_write32(PINT2_PINSTATE, val)
2062 #define bfin_write_PINT2_LATCH(val)		bfin_write32(PINT2_LATCH, val)
2067 #define bfin_write_PINT3_MASK_SET(val)		bfin_write32(PINT3_MASK_SET, val)
2069 #define bfin_write_PINT3_MASK_CLEAR(val)	bfin_write32(PINT3_MASK_CLEAR, val)
2071 #define bfin_write_PINT3_REQUEST(val)		bfin_write32(PINT3_REQUEST, val)
2073 #define bfin_write_PINT3_ASSIGN(val)		bfin_write32(PINT3_ASSIGN, val)
2075 #define bfin_write_PINT3_EDGE_SET(val)		bfin_write32(PINT3_EDGE_SET, val)
2077 #define bfin_write_PINT3_EDGE_CLEAR(val)	bfin_write32(PINT3_EDGE_CLEAR, val)
2079 #define bfin_write_PINT3_INVERT_SET(val)	bfin_write32(PINT3_INVERT_SET, val)
2081 #define bfin_write_PINT3_INVERT_CLEAR(val)	bfin_write32(PINT3_INVERT_CLEAR, val)
2083 #define bfin_write_PINT3_PINSTATE(val)		bfin_write32(PINT3_PINSTATE, val)
2085 #define bfin_write_PINT3_LATCH(val)		bfin_write32(PINT3_LATCH, val)
2090 #define bfin_write_PINT4_MASK_SET(val)		bfin_write32(PINT4_MASK_SET, val)
2092 #define bfin_write_PINT4_MASK_CLEAR(val)	bfin_write32(PINT4_MASK_CLEAR, val)
2094 #define bfin_write_PINT4_REQUEST(val)		bfin_write32(PINT4_REQUEST, val)
2096 #define bfin_write_PINT4_ASSIGN(val)		bfin_write32(PINT4_ASSIGN, val)
2098 #define bfin_write_PINT4_EDGE_SET(val)		bfin_write32(PINT4_EDGE_SET, val)
2100 #define bfin_write_PINT4_EDGE_CLEAR(val)	bfin_write32(PINT4_EDGE_CLEAR, val)
2102 #define bfin_write_PINT4_INVERT_SET(val)	bfin_write32(PINT4_INVERT_SET, val)
2104 #define bfin_write_PINT4_INVERT_CLEAR(val)	bfin_write32(PINT4_INVERT_CLEAR, val)
2106 #define bfin_write_PINT4_PINSTATE(val)		bfin_write32(PINT4_PINSTATE, val)
2108 #define bfin_write_PINT4_LATCH(val)		bfin_write32(PINT4_LATCH, val)
2113 #define bfin_write_PINT5_MASK_SET(val)		bfin_write32(PINT5_MASK_SET, val)
2115 #define bfin_write_PINT5_MASK_CLEAR(val)	bfin_write32(PINT5_MASK_CLEAR, val)
2117 #define bfin_write_PINT5_REQUEST(val)		bfin_write32(PINT5_REQUEST, val)
2119 #define bfin_write_PINT5_ASSIGN(val)		bfin_write32(PINT5_ASSIGN, val)
2121 #define bfin_write_PINT5_EDGE_SET(val)		bfin_write32(PINT5_EDGE_SET, val)
2123 #define bfin_write_PINT5_EDGE_CLEAR(val)	bfin_write32(PINT5_EDGE_CLEAR, val)
2125 #define bfin_write_PINT5_INVERT_SET(val)	bfin_write32(PINT5_INVERT_SET, val)
2127 #define bfin_write_PINT5_INVERT_CLEAR(val)	bfin_write32(PINT5_INVERT_CLEAR, val)
2129 #define bfin_write_PINT5_PINSTATE(val)		bfin_write32(PINT5_PINSTATE, val)
2131 #define bfin_write_PINT5_LATCH(val)		bfin_write32(PINT5_LATCH, val)
2136 #define bfin_write_PORTA_FER(val)	bfin_write32(PORTA_FER, val)
2138 #define bfin_write_PORTA_FER_SET(val)	bfin_write32(PORTA_FER_SET, val)
2140 #define bfin_write_PORTA_FER_CLEAR(val)	bfin_write32(PORTA_FER_CLEAR, val)
2142 #define bfin_write_PORTA(val)		bfin_write32(PORTA, val)
2144 #define bfin_write_PORTA_SET(val)	bfin_write32(PORTA_SET, val)
2146 #define bfin_write_PORTA_CLEAR(val)	bfin_write32(PORTA_CLEAR, val)
2148 #define bfin_write_PORTA_DIR(val)	bfin_write32(PORTA_DIR, val)
2150 #define bfin_write_PORTA_DIR_SET(val)	bfin_write32(PORTA_DIR_SET, val)
2152 #define bfin_write_PORTA_DIR_CLEAR(val)	bfin_write32(PORTA_DIR_CLEAR, val)
2154 #define bfin_write_PORTA_INEN(val)	bfin_write32(PORTA_INEN, val)
2156 #define bfin_write_PORTA_INEN_SET(val)	bfin_write32(PORTA_INEN_SET, val)
2158 #define bfin_write_PORTA_INEN_CLEAR(val)	bfin_write32(PORTA_INEN_CLEAR, val)
2160 #define bfin_write_PORTA_MUX(val)	bfin_write32(PORTA_MUX, val)
2162 #define bfin_write_PORTA_DATA_TGL(val)	bfin_write32(PORTA_DATA_TGL, val)
2164 #define bfin_write_PORTA_POL(val)	bfin_write32(PORTA_POL, val)
2166 #define bfin_write_PORTA_POL_SET(val)	bfin_write32(PORTA_POL_SET, val)
2168 #define bfin_write_PORTA_POL_CLEAR(val)	bfin_write32(PORTA_POL_CLEAR, val)
2170 #define bfin_write_PORTA_LOCK(val)	bfin_write32(PORTA_LOCK, val)
2172 #define bfin_write_PORTA_REVID(val)	bfin_write32(PORTA_REVID, val)
2178 #define bfin_write_PORTB_FER(val)	bfin_write32(PORTB_FER, val)
2180 #define bfin_write_PORTB_FER_SET(val)	bfin_write32(PORTB_FER_SET, val)
2182 #define bfin_write_PORTB_FER_CLEAR(val)	bfin_write32(PORTB_FER_CLEAR, val)
2184 #define bfin_write_PORTB(val)		bfin_write32(PORTB, val)
2186 #define bfin_write_PORTB_SET(val)	bfin_write32(PORTB_SET, val)
2188 #define bfin_write_PORTB_CLEAR(val)	bfin_write32(PORTB_CLEAR, val)
2190 #define bfin_write_PORTB_DIR(val)	bfin_write32(PORTB_DIR, val)
2192 #define bfin_write_PORTB_DIR_SET(val)	bfin_write32(PORTB_DIR_SET, val)
2194 #define bfin_write_PORTB_DIR_CLEAR(val)	bfin_write32(PORTB_DIR_CLEAR, val)
2196 #define bfin_write_PORTB_INEN(val)	bfin_write32(PORTB_INEN, val)
2198 #define bfin_write_PORTB_INEN_SET(val)	bfin_write32(PORTB_INEN_SET, val)
2200 #define bfin_write_PORTB_INEN_CLEAR(val)	bfin_write32(PORTB_INEN_CLEAR, val)
2202 #define bfin_write_PORTB_MUX(val)	bfin_write32(PORTB_MUX, val)
2204 #define bfin_write_PORTB_DATA_TGL(val)	bfin_write32(PORTB_DATA_TGL, val)
2206 #define bfin_write_PORTB_POL(val)	bfin_write32(PORTB_POL, val)
2208 #define bfin_write_PORTB_POL_SET(val)	bfin_write32(PORTB_POL_SET, val)
2210 #define bfin_write_PORTB_POL_CLEAR(val)	bfin_write32(PORTB_POL_CLEAR, val)
2212 #define bfin_write_PORTB_LOCK(val)	bfin_write32(PORTB_LOCK, val)
2214 #define bfin_write_PORTB_REVID(val)	bfin_write32(PORTB_REVID, val)
2219 #define bfin_write_PORTC_FER(val)	bfin_write32(PORTC_FER, val)
2221 #define bfin_write_PORTC_FER_SET(val)	bfin_write32(PORTC_FER_SET, val)
2223 #define bfin_write_PORTC_FER_CLEAR(val)	bfin_write32(PORTC_FER_CLEAR, val)
2225 #define bfin_write_PORTC(val)		bfin_write32(PORTC, val)
2227 #define bfin_write_PORTC_SET(val)	bfin_write32(PORTC_SET, val)
2229 #define bfin_write_PORTC_CLEAR(val)	bfin_write32(PORTC_CLEAR, val)
2231 #define bfin_write_PORTC_DIR(val)	bfin_write32(PORTC_DIR, val)
2233 #define bfin_write_PORTC_DIR_SET(val)	bfin_write32(PORTC_DIR_SET, val)
2235 #define bfin_write_PORTC_DIR_CLEAR(val)	bfin_write32(PORTC_DIR_CLEAR, val)
2237 #define bfin_write_PORTC_INEN(val)	bfin_write32(PORTC_INEN, val)
2239 #define bfin_write_PORTC_INEN_SET(val)	bfin_write32(PORTC_INEN_SET, val)
2241 #define bfin_write_PORTC_INEN_CLEAR(val)	bfin_write32(PORTC_INEN_CLEAR, val)
2243 #define bfin_write_PORTC_MUX(val)	bfin_write32(PORTC_MUX, val)
2245 #define bfin_write_PORTC_DATA_TGL(val)	bfin_write32(PORTC_DATA_TGL, val)
2247 #define bfin_write_PORTC_POL(val)	bfin_write32(PORTC_POL, val)
2249 #define bfin_write_PORTC_POL_SET(val)	bfin_write32(PORTC_POL_SET, val)
2251 #define bfin_write_PORTC_POL_CLEAR(val)	bfin_write32(PORTC_POL_CLEAR, val)
2253 #define bfin_write_PORTC_LOCK(val)	bfin_write32(PORTC_LOCK, val)
2255 #define bfin_write_PORTC_REVID(val)	bfin_write32(PORTC_REVID, val)
2260 #define bfin_write_PORTD_FER(val)	bfin_write32(PORTD_FER, val)
2262 #define bfin_write_PORTD_FER_SET(val)	bfin_write32(PORTD_FER_SET, val)
2264 #define bfin_write_PORTD_FER_CLEAR(val)	bfin_write32(PORTD_FER_CLEAR, val)
2266 #define bfin_write_PORTD(val)		bfin_write32(PORTD, val)
2268 #define bfin_write_PORTD_SET(val)	bfin_write32(PORTD_SET, val)
2270 #define bfin_write_PORTD_CLEAR(val)	bfin_write32(PORTD_CLEAR, val)
2272 #define bfin_write_PORTD_DIR(val)	bfin_write32(PORTD_DIR, val)
2274 #define bfin_write_PORTD_DIR_SET(val)	bfin_write32(PORTD_DIR_SET, val)
2276 #define bfin_write_PORTD_DIR_CLEAR(val)	bfin_write32(PORTD_DIR_CLEAR, val)
2278 #define bfin_write_PORTD_INEN(val)	bfin_write32(PORTD_INEN, val)
2280 #define bfin_write_PORTD_INEN_SET(val)	bfin_write32(PORTD_INEN_SET, val)
2282 #define bfin_write_PORTD_INEN_CLEAR(val)	bfin_write32(PORTD_INEN_CLEAR, val)
2284 #define bfin_write_PORTD_MUX(val)	bfin_write32(PORTD_MUX, val)
2286 #define bfin_write_PORTD_DATA_TGL(val)	bfin_write32(PORTD_DATA_TGL, val)
2288 #define bfin_write_PORTD_POL(val)	bfin_write32(PORTD_POL, val)
2290 #define bfin_write_PORTD_POL_SET(val)	bfin_write32(PORTD_POL_SET, val)
2292 #define bfin_write_PORTD_POL_CLEAR(val)	bfin_write32(PORTD_POL_CLEAR, val)
2294 #define bfin_write_PORTD_LOCK(val)	bfin_write32(PORTD_LOCK, val)
2296 #define bfin_write_PORTD_REVID(val)	bfin_write32(PORTD_REVID, val)
2301 #define bfin_write_PORTE_FER(val)	bfin_write32(PORTE_FER, val)
2303 #define bfin_write_PORTE_FER_SET(val)	bfin_write32(PORTE_FER_SET, val)
2305 #define bfin_write_PORTE_FER_CLEAR(val)	bfin_write32(PORTE_FER_CLEAR, val)
2307 #define bfin_write_PORTE(val)		bfin_write32(PORTE, val)
2309 #define bfin_write_PORTE_SET(val)	bfin_write32(PORTE_SET, val)
2311 #define bfin_write_PORTE_CLEAR(val)	bfin_write32(PORTE_CLEAR, val)
2313 #define bfin_write_PORTE_DIR(val)	bfin_write32(PORTE_DIR, val)
2315 #define bfin_write_PORTE_DIR_SET(val)	bfin_write32(PORTE_DIR_SET, val)
2317 #define bfin_write_PORTE_DIR_CLEAR(val)	bfin_write32(PORTE_DIR_CLEAR, val)
2319 #define bfin_write_PORTE_INEN(val)	bfin_write32(PORTE_INEN, val)
2321 #define bfin_write_PORTE_INEN_SET(val)	bfin_write32(PORTE_INEN_SET, val)
2323 #define bfin_write_PORTE_INEN_CLEAR(val)	bfin_write32(PORTE_INEN_CLEAR, val)
2325 #define bfin_write_PORTE_MUX(val)	bfin_write32(PORTE_MUX, val)
2327 #define bfin_write_PORTE_DATA_TGL(val)	bfin_write32(PORTE_DATA_TGL, val)
2329 #define bfin_write_PORTE_POL(val)	bfin_write32(PORTE_POL, val)
2331 #define bfin_write_PORTE_POL_SET(val)	bfin_write32(PORTE_POL_SET, val)
2333 #define bfin_write_PORTE_POL_CLEAR(val)	bfin_write32(PORTE_POL_CLEAR, val)
2335 #define bfin_write_PORTE_LOCK(val)	bfin_write32(PORTE_LOCK, val)
2337 #define bfin_write_PORTE_REVID(val)	bfin_write32(PORTE_REVID, val)
2342 #define bfin_write_PORTF_FER(val)	bfin_write32(PORTF_FER, val)
2344 #define bfin_write_PORTF_FER_SET(val)	bfin_write32(PORTF_FER_SET, val)
2346 #define bfin_write_PORTF_FER_CLEAR(val)	bfin_write32(PORTF_FER_CLEAR, val)
2348 #define bfin_write_PORTF(val)		bfin_write32(PORTF, val)
2350 #define bfin_write_PORTF_SET(val)	bfin_write32(PORTF_SET, val)
2352 #define bfin_write_PORTF_CLEAR(val)	bfin_write32(PORTF_CLEAR, val)
2354 #define bfin_write_PORTF_DIR(val)	bfin_write32(PORTF_DIR, val)
2356 #define bfin_write_PORTF_DIR_SET(val)	bfin_write32(PORTF_DIR_SET, val)
2358 #define bfin_write_PORTF_DIR_CLEAR(val)	bfin_write32(PORTF_DIR_CLEAR, val)
2360 #define bfin_write_PORTF_INEN(val)	bfin_write32(PORTF_INEN, val)
2362 #define bfin_write_PORTF_INEN_SET(val)	bfin_write32(PORTF_INEN_SET, val)
2364 #define bfin_write_PORTF_INEN_CLEAR(val)	bfin_write32(PORTF_INEN_CLEAR, val)
2366 #define bfin_write_PORTF_MUX(val)	bfin_write32(PORTF_MUX, val)
2368 #define bfin_write_PORTF_DATA_TGL(val)	bfin_write32(PORTF_DATA_TGL, val)
2370 #define bfin_write_PORTF_POL(val)	bfin_write32(PORTF_POL, val)
2372 #define bfin_write_PORTF_POL_SET(val)	bfin_write32(PORTF_POL_SET, val)
2374 #define bfin_write_PORTF_POL_CLEAR(val)	bfin_write32(PORTF_POL_CLEAR, val)
2376 #define bfin_write_PORTF_LOCK(val)	bfin_write32(PORTF_LOCK, val)
2378 #define bfin_write_PORTF_REVID(val)	bfin_write32(PORTF_REVID, val)
2383 #define bfin_write_PORTG_FER(val)	bfin_write32(PORTG_FER, val)
2385 #define bfin_write_PORTG_FER_SET(val)	bfin_write32(PORTG_FER_SET, val)
2387 #define bfin_write_PORTG_FER_CLEAR(val)	bfin_write32(PORTG_FER_CLEAR, val)
2389 #define bfin_write_PORTG(val)		bfin_write32(PORTG, val)
2391 #define bfin_write_PORTG_SET(val)	bfin_write32(PORTG_SET, val)
2393 #define bfin_write_PORTG_CLEAR(val)	bfin_write32(PORTG_CLEAR, val)
2395 #define bfin_write_PORTG_DIR(val)	bfin_write32(PORTG_DIR, val)
2397 #define bfin_write_PORTG_DIR_SET(val)	bfin_write32(PORTG_DIR_SET, val)
2399 #define bfin_write_PORTG_DIR_CLEAR(val)	bfin_write32(PORTG_DIR_CLEAR, val)
2401 #define bfin_write_PORTG_INEN(val)	bfin_write32(PORTG_INEN, val)
2403 #define bfin_write_PORTG_INEN_SET(val)	bfin_write32(PORTG_INEN_SET, val)
2405 #define bfin_write_PORTG_INEN_CLEAR(val)	bfin_write32(PORTG_INEN_CLEAR, val)
2407 #define bfin_write_PORTG_MUX(val)	bfin_write32(PORTG_MUX, val)
2409 #define bfin_write_PORTG_DATA_TGL(val)	bfin_write32(PORTG_DATA_TGL, val)
2411 #define bfin_write_PORTG_POL(val)	bfin_write32(PORTG_POL, val)
2413 #define bfin_write_PORTG_POL_SET(val)	bfin_write32(PORTG_POL_SET, val)
2415 #define bfin_write_PORTG_POL_CLEAR(val)	bfin_write32(PORTG_POL_CLEAR, val)
2417 #define bfin_write_PORTG_LOCK(val)	bfin_write32(PORTG_LOCK, val)
2419 #define bfin_write_PORTG_REVID(val)	bfin_write32(PORTG_REVID, val)
3182 #define bfin_write_CNT_COUNTER(val)	bfin_write32(CNT_COUNTER, val)
3184 #define bfin_write_CNT_MAX(val)		bfin_write32(CNT_MAX, val)
3186 #define bfin_write_CNT_MIN(val)		bfin_write32(CNT_MIN, val)
3192 #define bfin_write_RSI_ARGUMENT(val)	bfin_write32(RSI_ARGUMENT, val)
3198 #define bfin_write_RSI_RESPONSE0(val)	bfin_write32(RSI_RESPONSE0, val)
3200 #define bfin_write_RSI_RESPONSE1(val)	bfin_write32(RSI_RESPONSE1, val)
3202 #define bfin_write_RSI_RESPONSE2(val)	bfin_write32(RSI_RESPONSE2, val)
3204 #define bfin_write_RSI_RESPONSE3(val)	bfin_write32(RSI_RESPONSE3, val)
3206 #define bfin_write_RSI_DATA_TIMER(val)	bfin_write32(RSI_DATA_TIMER, val)
3214 #define bfin_write_RSI_STATUS(val)	bfin_write32(RSI_STATUS, val)
3218 #define bfin_write_RSI_MASK0(val)	bfin_write32(RSI_MASK0, val)
3220 #define bfin_write_RSI_MASK1(val)	bfin_write32(RSI_MASK1, val)
3228 #define bfin_write_RSI_FIFO(val)	bfin_write32(RSI_FIFO, val)
3230 #define bfin_write_RSI_E_STATUS(val)	bfin_write32(RSI_ESTAT, val)
3232 #define bfin_write_RSI_E_MASK(val)	bfin_write32(RSI_EMASK, val)