Lines Matching refs:icplb_bounds
24 struct cplb_boundary icplb_bounds[9] PDT_ATTR; variable
175 icplb_bounds[i_i].eaddr = uncached_end; in generate_cplb_tables_all()
176 icplb_bounds[i_i++].data = SDRAM_IGENERIC; in generate_cplb_tables_all()
181 icplb_bounds[i_i].eaddr = _ramend; in generate_cplb_tables_all()
182 icplb_bounds[i_i++].data = 0; in generate_cplb_tables_all()
185 icplb_bounds[i_i].eaddr = physical_mem_end; in generate_cplb_tables_all()
186 icplb_bounds[i_i++].data = (reserved_mem_icache_on ? in generate_cplb_tables_all()
190 icplb_bounds[i_i].eaddr = ASYNC_BANK0_BASE; in generate_cplb_tables_all()
191 icplb_bounds[i_i++].data = 0; in generate_cplb_tables_all()
193 icplb_bounds[i_i].eaddr = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE; in generate_cplb_tables_all()
194 icplb_bounds[i_i++].data = SDRAM_EBIU; in generate_cplb_tables_all()
196 icplb_bounds[i_i].eaddr = BOOT_ROM_START; in generate_cplb_tables_all()
197 icplb_bounds[i_i++].data = 0; in generate_cplb_tables_all()
199 icplb_bounds[i_i].eaddr = BOOT_ROM_START + BOOT_ROM_LENGTH; in generate_cplb_tables_all()
200 icplb_bounds[i_i++].data = SDRAM_IGENERIC; in generate_cplb_tables_all()
204 icplb_bounds[i_i].eaddr = L2_START; in generate_cplb_tables_all()
205 icplb_bounds[i_i++].data = 0; in generate_cplb_tables_all()
207 icplb_bounds[i_i].eaddr = L2_START + L2_LENGTH; in generate_cplb_tables_all()
208 icplb_bounds[i_i++].data = L2_IMEMORY; in generate_cplb_tables_all()
211 BUG_ON(icplb_nr_bounds > ARRAY_SIZE(icplb_bounds)); in generate_cplb_tables_all()