Lines Matching refs:CPLB_COMMON
23 #define CPLB_COMMON (CPLB_DIRTY | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY… macro
26 #define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_COMMON)
28 #define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON)
30 #define SDRAM_DGENERIC (CPLB_COMMON)
33 #define SDRAM_DNON_CHBL (CPLB_COMMON)
34 #define SDRAM_EBIU (CPLB_COMMON)
37 #define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON)
41 #define L2_IMEMORY (CPLB_COMMON | PAGE_SIZE_1MB)
42 #define L2_DMEMORY (CPLB_LOCK | CPLB_COMMON | PAGE_SIZE_1MB)
53 # define L2_DMEMORY (CPLB_L1_CHBL | CPLB_COMMON | PAGE_SIZE_1MB)
55 # define L2_DMEMORY (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON | PAGE_SIZE_1MB)
57 # define L2_DMEMORY (CPLB_COMMON | PAGE_SIZE_1MB)