Lines Matching defs:p
278 #define UART_GET_CHAR(p) bfin_read32(port_membase(p) + OFFSET_RBR) argument
279 #define UART_GET_CLK(p) bfin_read32(port_membase(p) + OFFSET_CLK) argument
280 #define UART_GET_CTL(p) bfin_read32(port_membase(p) + OFFSET_CTL) argument
281 #define UART_GET_GCTL(p) UART_GET_CTL(p) argument
282 #define UART_GET_LCR(p) UART_GET_CTL(p) argument
283 #define UART_GET_MCR(p) UART_GET_CTL(p) argument
285 #define UART_GET_STAT(p) \ argument
295 #define UART_GET_STAT(p) bfin_read32(port_membase(p) + OFFSET_STAT) argument
297 #define UART_GET_MSR(p) UART_GET_STAT(p) argument
299 #define UART_PUT_CHAR(p, v) bfin_write32(port_membase(p) + OFFSET_THR, v) argument
300 #define UART_PUT_CLK(p, v) bfin_write32(port_membase(p) + OFFSET_CLK, v) argument
301 #define UART_PUT_CTL(p, v) bfin_write32(port_membase(p) + OFFSET_CTL, v) argument
302 #define UART_PUT_GCTL(p, v) UART_PUT_CTL(p, v) argument
303 #define UART_PUT_LCR(p, v) UART_PUT_CTL(p, v) argument
304 #define UART_PUT_MCR(p, v) UART_PUT_CTL(p, v) argument
305 #define UART_PUT_STAT(p, v) bfin_write32(port_membase(p) + OFFSET_STAT, v) argument
307 #define UART_CLEAR_IER(p, v) bfin_write32(port_membase(p) + OFFSET_IER_CLEAR, v) argument
308 #define UART_GET_IER(p) bfin_read32(port_membase(p) + OFFSET_IER) argument
309 #define UART_SET_IER(p, v) bfin_write32(port_membase(p) + OFFSET_IER_SET, v) argument
311 #define UART_CLEAR_DLAB(p) /* MMRs not muxed on BF60x */ argument
312 #define UART_SET_DLAB(p) /* MMRs not muxed on BF60x */ argument
314 #define UART_CLEAR_LSR(p) UART_PUT_STAT(p, -1) argument
315 #define UART_GET_LSR(p) UART_GET_STAT(p) argument
316 #define UART_PUT_LSR(p, v) UART_PUT_STAT(p, v) argument
320 #define UART_CLEAR_SCTS(p) UART_PUT_STAT(p, SCTS) argument
329 #define UART_GET_CHAR(p) bfin_read16(port_membase(p) + OFFSET_RBR) argument
330 #define UART_GET_DLL(p) bfin_read16(port_membase(p) + OFFSET_DLL) argument
331 #define UART_GET_DLH(p) bfin_read16(port_membase(p) + OFFSET_DLH) argument
332 #define UART_GET_CLK(p) ((UART_GET_DLH(p) << 8) | UART_GET_DLL(p)) argument
333 #define UART_GET_GCTL(p) bfin_read16(port_membase(p) + OFFSET_GCTL) argument
334 #define UART_GET_LCR(p) bfin_read16(port_membase(p) + OFFSET_LCR) argument
335 #define UART_GET_MCR(p) bfin_read16(port_membase(p) + OFFSET_MCR) argument
336 #define UART_GET_MSR(p) bfin_read16(port_membase(p) + OFFSET_MSR) argument
338 #define UART_PUT_CHAR(p, v) bfin_write16(port_membase(p) + OFFSET_THR, v) argument
339 #define UART_PUT_DLL(p, v) bfin_write16(port_membase(p) + OFFSET_DLL, v) argument
340 #define UART_PUT_DLH(p, v) bfin_write16(port_membase(p) + OFFSET_DLH, v) argument
341 #define UART_PUT_CLK(p, v) do \ argument
346 #define UART_PUT_GCTL(p, v) bfin_write16(port_membase(p) + OFFSET_GCTL, v) argument
347 #define UART_PUT_LCR(p, v) bfin_write16(port_membase(p) + OFFSET_LCR, v) argument
348 #define UART_PUT_MCR(p, v) bfin_write16(port_membase(p) + OFFSET_MCR, v) argument
352 #define UART_CLEAR_IER(p, v) bfin_write16(port_membase(p) + OFFSET_IER_CLEAR, v) argument
353 #define UART_GET_IER(p) bfin_read16(port_membase(p) + OFFSET_IER_SET) argument
354 #define UART_SET_IER(p, v) bfin_write16(port_membase(p) + OFFSET_IER_SET, v) argument
356 #define UART_CLEAR_DLAB(p) /* MMRs not muxed on BF54x */ argument
357 #define UART_SET_DLAB(p) /* MMRs not muxed on BF54x */ argument
359 #define UART_CLEAR_LSR(p) bfin_write16(port_membase(p) + OFFSET_LSR, -1) argument
360 #define UART_GET_LSR(p) bfin_read16(port_membase(p) + OFFSET_LSR) argument
361 #define UART_PUT_LSR(p, v) bfin_write16(port_membase(p) + OFFSET_LSR, v) argument
365 #define UART_CLEAR_SCTS(p) bfin_write16((port_membase(p) + OFFSET_MSR), SCTS) argument
374 #define UART_CLEAR_IER(p, v) UART_PUT_IER(p, UART_GET_IER(p) & ~(v)) argument
375 #define UART_GET_IER(p) bfin_read16(port_membase(p) + OFFSET_IER) argument
376 #define UART_PUT_IER(p, v) bfin_write16(port_membase(p) + OFFSET_IER, v) argument
377 #define UART_SET_IER(p, v) UART_PUT_IER(p, UART_GET_IER(p) | (v)) argument
379 #define UART_CLEAR_DLAB(p) do { UART_PUT_LCR(p, UART_GET_LCR(p) & ~DLAB); SSYNC(); } while (0) argument
380 #define UART_SET_DLAB(p) do { UART_PUT_LCR(p, UART_GET_LCR(p) | DLAB); SSYNC(); } while (0) argument
398 static inline void UART_CLEAR_LSR(void *p) in UART_CLEAR_LSR()
403 static inline unsigned int UART_GET_LSR(void *p) in UART_GET_LSR()
409 static inline void UART_PUT_LSR(void *p, uint16_t val) in UART_PUT_LSR()