Lines Matching refs:msr
104 msr tpidr_el0, x2
105 msr tpidrro_el0, x3
106 msr contextidr_el1, x4
107 msr mair_el1, x5
108 msr cpacr_el1, x6
109 msr ttbr0_el1, x1
110 msr ttbr1_el1, x7
112 msr tcr_el1, x8
113 msr vbar_el1, x9
114 msr mdscr_el1, x10
119 msr oslar_el1, x11
138 msr ttbr0_el1, x0 // set TTBR0
156 msr cpacr_el1, x0 // Enable FP/ASIMD
158 msr mdscr_el1, x0 // access to the DCC from EL0
178 msr mair_el1, x5
214 msr tcr_el1, x10