Lines Matching refs:x0
232 mov x21, x0 // x21=FDT
234 adr_l x0, boot_args // record the contents of
235 stp x21, x1, [x0] // x0 .. x3 at kernel entry
236 stp x2, x3, [x0, #16]
241 add x1, x0, #0x20 // 4 x 8 bytes
320 mov x0, x25
327 mov x0, x25
329 1: stp xzr, xzr, [x0], #16
330 stp xzr, xzr, [x0], #16
331 stp xzr, xzr, [x0], #16
332 stp xzr, xzr, [x0], #16
333 cmp x0, x6
341 mov x0, x25 // idmap_pg_dir
379 create_table_entry x0, x3, EXTRA_SHIFT, EXTRA_PTRS, x5, x6
383 create_pgd_entry x0, x3, x5, x6
386 create_block_map x0, x7, x3, x5, x6
391 mov x0, x26 // swapper_pg_dir
393 create_pgd_entry x0, x5, x3, x6
396 create_block_map x0, x7, x3, x5, x6
403 mov x0, x25
449 mrs x0, CurrentEL
450 cmp x0, #CurrentEL_EL2
452 mrs x0, sctlr_el2
453 CPU_BE( orr x0, x0, #(1 << 25) ) // Set the EE bit for EL2
454 CPU_LE( bic x0, x0, #(1 << 25) ) // Clear the EE bit for EL2
455 msr sctlr_el2, x0
457 1: mrs x0, sctlr_el1
458 CPU_BE( orr x0, x0, #(3 << 24) ) // Set the EE and E0E bits for EL1
459 CPU_LE( bic x0, x0, #(3 << 24) ) // Clear the EE and E0E bits for EL1
460 msr sctlr_el1, x0
466 2: mov x0, #(1 << 31) // 64-bit EL1
467 msr hcr_el2, x0
470 mrs x0, cnthctl_el2
471 orr x0, x0, #3 // Enable EL1 physical timers
472 msr cnthctl_el2, x0
477 mrs x0, id_aa64pfr0_el1
478 ubfx x0, x0, #24, #4
479 cmp x0, #1
482 mrs_s x0, ICC_SRE_EL2
483 orr x0, x0, #ICC_SRE_EL2_SRE // Set ICC_SRE_EL2.SRE==1
484 orr x0, x0, #ICC_SRE_EL2_ENABLE // Set ICC_SRE_EL2.Enable==1
485 msr_s ICC_SRE_EL2, x0
487 mrs_s x0, ICC_SRE_EL2 // Read SRE back,
488 tbz x0, #0, 3f // and check that it sticks
495 mrs x0, midr_el1
497 msr vpidr_el2, x0
501 mov x0, #0x0800 // Set/clear RES{1,0} bits
502 CPU_BE( movk x0, #0x33d0, lsl #16 ) // Set EE and E0E on BE systems
503 CPU_LE( movk x0, #0x30d0, lsl #16 ) // Clear EE and E0E on LE systems
504 msr sctlr_el1, x0
507 mov x0, #0x33ff
508 msr cptr_el2, x0 // Disable copro. traps to EL2
515 mrs x0, id_aa64dfr0_el1 // Check ID_AA64DFR0_EL1 PMUVer
516 sbfx x0, x0, #8, #4
517 cmp x0, #1
519 mrs x0, pmcr_el0 // Disable debug access traps
520 ubfx x0, x0, #11, #5 // to EL2 and allow access to
521 msr mdcr_el2, x0 // all PMU counters from EL1
528 adrp x0, __hyp_stub_vectors
529 add x0, x0, #:lo12:__hyp_stub_vectors
530 msr vbar_el2, x0
533 mov x0, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\
535 msr spsr_el2, x0
577 mrs x0, mpidr_el1
579 and x0, x0, x1
582 cmp x4, x0
612 ldr x0, [x21] // get secondary_data.stack
613 mov sp, x0
640 msr sctlr_el1, x0