Lines Matching refs:x24
85 stp x24, x25, [sp, #16 * 12]
158 ldp x24, x25, [sp, #16 * 12]
288 lsr x24, x1, #ESR_ELx_EC_SHIFT // exception class
289 cmp x24, #ESR_ELx_EC_DABT_CUR // data abort in EL1
291 cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
293 cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception
295 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
297 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL1
299 cmp x24, #ESR_ELx_EC_BREAKPT_CUR // debug exception in EL1
337 cmp x24, #ESR_ELx_EC_BRK64 // if BRK64
338 cinc x24, x24, eq // set bit '0'
339 tbz x24, #0, el1_inv // EL1 only
380 mov x24, lr
384 ret x24
394 lsr x24, x25, #ESR_ELx_EC_SHIFT // exception class
395 cmp x24, #ESR_ELx_EC_SVC64 // SVC in 64-bit state
397 cmp x24, #ESR_ELx_EC_DABT_LOW // data abort in EL0
399 cmp x24, #ESR_ELx_EC_IABT_LOW // instruction abort in EL0
401 cmp x24, #ESR_ELx_EC_FP_ASIMD // FP/ASIMD access
403 cmp x24, #ESR_ELx_EC_FP_EXC64 // FP/ASIMD exception
405 cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
407 cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception
409 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
411 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0
413 cmp x24, #ESR_ELx_EC_BREAKPT_LOW // debug exception in EL0
422 lsr x24, x25, #ESR_ELx_EC_SHIFT // exception class
423 cmp x24, #ESR_ELx_EC_SVC32 // SVC in 32-bit state
425 cmp x24, #ESR_ELx_EC_DABT_LOW // data abort in EL0
427 cmp x24, #ESR_ELx_EC_IABT_LOW // instruction abort in EL0
429 cmp x24, #ESR_ELx_EC_FP_ASIMD // FP/ASIMD access
431 cmp x24, #ESR_ELx_EC_FP_EXC32 // FP/ASIMD exception
433 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
435 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0
437 cmp x24, #ESR_ELx_EC_CP15_32 // CP15 MRC/MCR trap
439 cmp x24, #ESR_ELx_EC_CP15_64 // CP15 MRRC/MCRR trap
441 cmp x24, #ESR_ELx_EC_CP14_MR // CP14 MRC/MCR trap
443 cmp x24, #ESR_ELx_EC_CP14_LS // CP14 LDC/STC trap
445 cmp x24, #ESR_ELx_EC_CP14_64 // CP14 MRRC/MCRR trap
447 cmp x24, #ESR_ELx_EC_BREAKPT_LOW // debug exception in EL0
538 tbnz x24, #0, el0_inv // EL0 only
588 stp x23, x24, [x8], #16
596 ldp x23, x24, [x8], #16