Lines Matching refs:ARM64_FTR_REG
240 #define ARM64_FTR_REG(id, table) \ macro
250 ARM64_FTR_REG(SYS_ID_PFR0_EL1, ftr_id_pfr0),
251 ARM64_FTR_REG(SYS_ID_PFR1_EL1, ftr_generic_32bits),
252 ARM64_FTR_REG(SYS_ID_DFR0_EL1, ftr_generic_32bits),
253 ARM64_FTR_REG(SYS_ID_MMFR0_EL1, ftr_id_mmfr0),
254 ARM64_FTR_REG(SYS_ID_MMFR1_EL1, ftr_generic_32bits),
255 ARM64_FTR_REG(SYS_ID_MMFR2_EL1, ftr_generic_32bits),
256 ARM64_FTR_REG(SYS_ID_MMFR3_EL1, ftr_generic_32bits),
259 ARM64_FTR_REG(SYS_ID_ISAR0_EL1, ftr_generic_32bits),
260 ARM64_FTR_REG(SYS_ID_ISAR1_EL1, ftr_generic_32bits),
261 ARM64_FTR_REG(SYS_ID_ISAR2_EL1, ftr_generic_32bits),
262 ARM64_FTR_REG(SYS_ID_ISAR3_EL1, ftr_generic_32bits),
263 ARM64_FTR_REG(SYS_ID_ISAR4_EL1, ftr_generic_32bits),
264 ARM64_FTR_REG(SYS_ID_ISAR5_EL1, ftr_id_isar5),
265 ARM64_FTR_REG(SYS_ID_MMFR4_EL1, ftr_id_mmfr4),
268 ARM64_FTR_REG(SYS_MVFR0_EL1, ftr_generic_32bits),
269 ARM64_FTR_REG(SYS_MVFR1_EL1, ftr_generic_32bits),
270 ARM64_FTR_REG(SYS_MVFR2_EL1, ftr_mvfr2),
273 ARM64_FTR_REG(SYS_ID_AA64PFR0_EL1, ftr_id_aa64pfr0),
274 ARM64_FTR_REG(SYS_ID_AA64PFR1_EL1, ftr_aa64raz),
277 ARM64_FTR_REG(SYS_ID_AA64DFR0_EL1, ftr_id_aa64dfr0),
278 ARM64_FTR_REG(SYS_ID_AA64DFR1_EL1, ftr_generic),
281 ARM64_FTR_REG(SYS_ID_AA64ISAR0_EL1, ftr_id_aa64isar0),
282 ARM64_FTR_REG(SYS_ID_AA64ISAR1_EL1, ftr_aa64raz),
285 ARM64_FTR_REG(SYS_ID_AA64MMFR0_EL1, ftr_id_aa64mmfr0),
286 ARM64_FTR_REG(SYS_ID_AA64MMFR1_EL1, ftr_id_aa64mmfr1),
289 ARM64_FTR_REG(SYS_CTR_EL0, ftr_ctr),
290 ARM64_FTR_REG(SYS_DCZID_EL0, ftr_dczid),
293 ARM64_FTR_REG(SYS_CNTFRQ_EL0, ftr_generic32),