Lines Matching refs:instructions
229 The workaround promotes data cache clean instructions to
238 …bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to th…
250 The workaround promotes data cache clean instructions to
272 The workaround promotes data cache clean instructions to
281 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
293 The workaround promotes data cache clean instructions to
309 instructions to Write-Back memory are mixed with Device loads.
372 which fixes potentially affected ADRP instructions through the
594 bool "Emulate deprecated/obsolete ARMv8 instructions"
597 Legacy software support may require certain instructions
608 bool "Emulate SWP/SWPB instructions"
610 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
612 emulation of these instructions for userspace using LDXR/STXR.
629 bool "Emulate CP15 Barrier instructions"
631 The CP15 barrier instructions - CP15ISB, CP15DSB, and
634 instructions instead.
637 instructions for AArch32 userspace code. When this option is
694 bool "Atomic instructions"
697 atomic instructions that are designed specifically to scale in
700 Say Y here to make use of these instructions for the in-kernel
702 not support these instructions and requires the kernel to be