Lines Matching refs:S3C2410_USBDREG
14 #define S3C2410_USBDREG(x) (x) macro
16 #define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140)
17 #define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144)
18 #define S3C2410_UDC_EP_INT_REG S3C2410_USBDREG(0x0148)
20 #define S3C2410_UDC_USB_INT_REG S3C2410_USBDREG(0x0158)
21 #define S3C2410_UDC_EP_INT_EN_REG S3C2410_USBDREG(0x015c)
23 #define S3C2410_UDC_USB_INT_EN_REG S3C2410_USBDREG(0x016c)
25 #define S3C2410_UDC_FRAME_NUM1_REG S3C2410_USBDREG(0x0170)
26 #define S3C2410_UDC_FRAME_NUM2_REG S3C2410_USBDREG(0x0174)
28 #define S3C2410_UDC_EP0_FIFO_REG S3C2410_USBDREG(0x01c0)
29 #define S3C2410_UDC_EP1_FIFO_REG S3C2410_USBDREG(0x01c4)
30 #define S3C2410_UDC_EP2_FIFO_REG S3C2410_USBDREG(0x01c8)
31 #define S3C2410_UDC_EP3_FIFO_REG S3C2410_USBDREG(0x01cc)
32 #define S3C2410_UDC_EP4_FIFO_REG S3C2410_USBDREG(0x01d0)
34 #define S3C2410_UDC_EP1_DMA_CON S3C2410_USBDREG(0x0200)
35 #define S3C2410_UDC_EP1_DMA_UNIT S3C2410_USBDREG(0x0204)
36 #define S3C2410_UDC_EP1_DMA_FIFO S3C2410_USBDREG(0x0208)
37 #define S3C2410_UDC_EP1_DMA_TTC_L S3C2410_USBDREG(0x020c)
38 #define S3C2410_UDC_EP1_DMA_TTC_M S3C2410_USBDREG(0x0210)
39 #define S3C2410_UDC_EP1_DMA_TTC_H S3C2410_USBDREG(0x0214)
41 #define S3C2410_UDC_EP2_DMA_CON S3C2410_USBDREG(0x0218)
42 #define S3C2410_UDC_EP2_DMA_UNIT S3C2410_USBDREG(0x021c)
43 #define S3C2410_UDC_EP2_DMA_FIFO S3C2410_USBDREG(0x0220)
44 #define S3C2410_UDC_EP2_DMA_TTC_L S3C2410_USBDREG(0x0224)
45 #define S3C2410_UDC_EP2_DMA_TTC_M S3C2410_USBDREG(0x0228)
46 #define S3C2410_UDC_EP2_DMA_TTC_H S3C2410_USBDREG(0x022c)
48 #define S3C2410_UDC_EP3_DMA_CON S3C2410_USBDREG(0x0240)
49 #define S3C2410_UDC_EP3_DMA_UNIT S3C2410_USBDREG(0x0244)
50 #define S3C2410_UDC_EP3_DMA_FIFO S3C2410_USBDREG(0x0248)
51 #define S3C2410_UDC_EP3_DMA_TTC_L S3C2410_USBDREG(0x024c)
52 #define S3C2410_UDC_EP3_DMA_TTC_M S3C2410_USBDREG(0x0250)
53 #define S3C2410_UDC_EP3_DMA_TTC_H S3C2410_USBDREG(0x0254)
55 #define S3C2410_UDC_EP4_DMA_CON S3C2410_USBDREG(0x0258)
56 #define S3C2410_UDC_EP4_DMA_UNIT S3C2410_USBDREG(0x025c)
57 #define S3C2410_UDC_EP4_DMA_FIFO S3C2410_USBDREG(0x0260)
58 #define S3C2410_UDC_EP4_DMA_TTC_L S3C2410_USBDREG(0x0264)
59 #define S3C2410_UDC_EP4_DMA_TTC_M S3C2410_USBDREG(0x0268)
60 #define S3C2410_UDC_EP4_DMA_TTC_H S3C2410_USBDREG(0x026c)
62 #define S3C2410_UDC_INDEX_REG S3C2410_USBDREG(0x0178)
66 #define S3C2410_UDC_MAXP_REG S3C2410_USBDREG(0x0180)
68 #define S3C2410_UDC_EP0_CSR_REG S3C2410_USBDREG(0x0184)
70 #define S3C2410_UDC_IN_CSR1_REG S3C2410_USBDREG(0x0184)
71 #define S3C2410_UDC_IN_CSR2_REG S3C2410_USBDREG(0x0188)
73 #define S3C2410_UDC_OUT_CSR1_REG S3C2410_USBDREG(0x0190)
74 #define S3C2410_UDC_OUT_CSR2_REG S3C2410_USBDREG(0x0194)
75 #define S3C2410_UDC_OUT_FIFO_CNT1_REG S3C2410_USBDREG(0x0198)
76 #define S3C2410_UDC_OUT_FIFO_CNT2_REG S3C2410_USBDREG(0x019c)