217 	p->dma_write(ccr, CCR, lch);  in omap_set_dma_priority()
231 	p->dma_write(l, CSDP, lch);  in omap_set_dma_transfer_params()
240 		p->dma_write(ccr, CCR, lch);  in omap_set_dma_transfer_params()
246 		p->dma_write(ccr, CCR2, lch);  in omap_set_dma_transfer_params()
277 		p->dma_write(val, CCR, lch);  in omap_set_dma_transfer_params()
280 	p->dma_write(elem_count, CEN, lch);  in omap_set_dma_transfer_params()
281 	p->dma_write(frame_count, CFN, lch);  in omap_set_dma_transfer_params()
293 		p->dma_write(csdp, CSDP, lch);  in omap_set_dma_write_mode()
306 		p->dma_write(l, LCH_CTRL, lch);  in omap_set_dma_channel_mode()
324 		p->dma_write(w, CSDP, lch);  in omap_set_dma_src_params()
330 	p->dma_write(l, CCR, lch);  in omap_set_dma_src_params()
332 	p->dma_write(src_start, CSSA, lch);  in omap_set_dma_src_params()
334 	p->dma_write(src_ei, CSEI, lch);  in omap_set_dma_src_params()
335 	p->dma_write(src_fi, CSFI, lch);  in omap_set_dma_src_params()
366 	p->dma_write(l, CSDP, lch);  in omap_set_dma_src_data_pack()
411 	p->dma_write(l, CSDP, lch);  in omap_set_dma_src_burst_mode()
426 		p->dma_write(l, CSDP, lch);  in omap_set_dma_dest_params()
432 	p->dma_write(l, CCR, lch);  in omap_set_dma_dest_params()
434 	p->dma_write(dest_start, CDSA, lch);  in omap_set_dma_dest_params()
436 	p->dma_write(dst_ei, CDEI, lch);  in omap_set_dma_dest_params()
437 	p->dma_write(dst_fi, CDFI, lch);  in omap_set_dma_dest_params()
449 	p->dma_write(l, CSDP, lch);  in omap_set_dma_dest_data_pack()
491 	p->dma_write(l, CSDP, lch);  in omap_set_dma_dest_burst_mode()
501 		p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);  in omap_enable_channel_irq()
504 	p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch);  in omap_enable_channel_irq()
510 	p->dma_write(0, CICR, lch);  in omap_disable_channel_irq()
515 		p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);  in omap_disable_channel_irq()
549 	p->dma_write(l, CLNK_CTRL, lch);  in enable_lnk()
571 	p->dma_write(l, CLNK_CTRL, lch);  in disable_lnk()
585 	p->dma_write(1 << lch, IRQSTATUS_L0, lch);  in omap2_enable_irq_lch()
589 	p->dma_write(val, IRQENABLE_L0, lch);  in omap2_enable_irq_lch()
605 	p->dma_write(val, IRQENABLE_L0, lch);  in omap2_disable_irq_lch()
607 	p->dma_write(1 << lch, IRQSTATUS_L0, lch);  in omap2_disable_irq_lch()
674 		p->dma_write(dev_id | (1 << 10), CCR, free_ch);  in omap_request_dma()
676 		p->dma_write(dev_id, CCR, free_ch);  in omap_request_dma()
708 	p->dma_write(0, CCR, lch);  in omap_free_dma()
751 	p->dma_write(reg, GCR, 0);  in omap_dma_set_global_params()
781 	p->dma_write(l, CCR, lch);  in omap_dma_set_prio_lch()
809 		p->dma_write(0, CPC, lch);  in omap_start_dma()
811 		p->dma_write(0, CDAC, lch);  in omap_start_dma()
839 		p->dma_write(lch, CLNK_CTRL, lch);  in omap_start_dma()
856 	p->dma_write(l, CCR, lch);  in omap_start_dma()
880 		p->dma_write(l , OCP_SYSCONFIG, 0);  in omap_stop_dma()
884 		p->dma_write(l, CCR, lch);  in omap_stop_dma()
897 		p->dma_write(sys_cf, OCP_SYSCONFIG, lch);  in omap_stop_dma()
900 		p->dma_write(l, CCR, lch);  in omap_stop_dma()
1068 			p->dma_write(p->dma_read(CCR, lch_head) | (3 << 8),  in omap_dma_link_lch()
1156 		p->dma_write(1 << ch, IRQSTATUS_L0, ch);  in omap2_dma_handle_ch()
1176 			p->dma_write(ccr, CCR, ch);  in omap2_dma_handle_ch()
1187 	p->dma_write(status, CSR, ch);  in omap2_dma_handle_ch()
1188 	p->dma_write(1 << ch, IRQSTATUS_L0, ch);  in omap2_dma_handle_ch()
1207 		p->dma_write(status, CSR, ch);  in omap2_dma_handle_ch()
1270 	p->dma_write(omap_dma_global_context.dma_gcr, GCR, 0);  in omap_dma_global_context_restore()
1271 	p->dma_write(omap_dma_global_context.dma_ocp_sysconfig,  in omap_dma_global_context_restore()
1273 	p->dma_write(omap_dma_global_context.dma_irqenable_l0,  in omap_dma_global_context_restore()
1275 	p->dma_write(omap_dma_global_context.dma_irqenable_l1,  in omap_dma_global_context_restore()
1279 		p->dma_write(0x3 , IRQSTATUS_L0, 0);  in omap_dma_global_context_restore()