Lines Matching refs:c1
42 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
45 mcr p15, 0, r0, c1, c0, 0 @ disable caches
60 mrc p15, 0, r1, c1, c0, 0 @ ctrl register
62 mcr p15, 0, r1, c1, c0, 0 @ disable MMU
147 mrc p15, 0, r7, c1, c0, 1 @ auxiliary control register
148 mrc p15, 0, r8, c1, c0, 2 @ co-processor access control
149 mrc p15, 0, r9, c1, c0, 0 @ control register
171 mcr p15, 0, r7, c1, c0, 1 @ auxiliary control register
172 mcr p15, 0, r8, c1, c0, 2 @ co-processor access control
200 ALT_SMP(mrc p15, 0, r0, c1, c0, 1) @ Enable SMP/nAMP mode
203 ALT_SMP(mcr p15, 0, r0, c1, c0, 1)
225 mrc p15, 0, r0, c1, c0, 0 @ read control register
239 mrceq p15, 0, r5, c1, c0, 1 @ load aux control reg
241 mcreq p15, 0, r5, c1, c0, 1 @ write aux control reg