Lines Matching refs:c0
40 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
43 mcr p15, 0, r0, c1, c0, 0 @ disable caches
57 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
60 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
70 mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
296 mcr p15, 0, r0, c6, c0, 0 @ set area 0, default
297 mcr p15, 0, r0, c6, c0, 1
312 mcr p15, 0, r0, c2, c0, 0 @ Region 1&2 cacheable
313 mcr p15, 0, r0, c2, c0, 1
319 mcr p15, 0, r0, c3, c0, 0
323 mcr p15, 0, r0, c5, c0, 0 @ all read/write access
324 mcr p15, 0, r0, c5, c0, 1
326 mrc p15, 0, r0, c1, c0 @ get control register