Lines Matching refs:c7

123 	mcr	p15, 0, ip, c7, c7, 0		@ invalidate I,D caches
124 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
126 	mcr	p15, 0, ip, c8, c7, 0		@ invalidate I & D TLBs
143 	mcr	p15, 0, r0, c7, c10, 4		@ Drain write buffer
146 	mcr	p15, 0, r0, c7, c0, 4		@ Wait for interrupt
157 	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
180 	mcr	p15, 0, ip, c7, c6, 0		@ invalidate D cache
184 2:	mcr	p15, 0, r3, c7, c14, 2		@ clean+invalidate D index
189 	mcrne	p15, 0, ip, c7, c5, 0		@ invalidate I cache
190 	mcrne	p15, 0, ip, c7, c10, 4		@ drain WB
210 	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
211 	mcrne	p15, 0, r0, c7, c5, 1		@ invalidate I entry
213 	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
214 	mcrne	p15, 0, r0, c7, c5, 1		@ invalidate I entry
217 	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D entry
218 	mcrne	p15, 0, r0, c7, c5, 1		@ invalidate I entry
220 	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D entry
221 	mcrne	p15, 0, r0, c7, c5, 1		@ invalidate I entry
227 	mcrne	p15, 0, ip, c7, c10, 4		@ drain WB
255 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
256 	mcr	p15, 0, r0, c7, c5, 1		@ invalidate I entry
260 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
275 1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
280 	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
281 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
300 	mcrne	p15, 0, r0, c7, c10, 1		@ clean D entry
302 	mcrne	p15, 0, r1, c7, c10, 1		@ clean D entry
305 1:	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
309 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
325 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
330 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
345 	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
347 	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
352 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
387 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
392 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
409 	mcr	p15, 0, ip, c7, c6, 0		@ invalidate D cache
413 2:	mcr	p15, 0, r3, c7, c14, 2		@ clean & invalidate D index
417 	mcr	p15, 0, ip, c7, c5, 0		@ invalidate I cache
418 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
420 	mcr	p15, 0, ip, c8, c7, 0		@ invalidate I & D TLBs
435 	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
437 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
450 	mcr	p15, 0, r0, c7, c7		@ invalidate I,D caches on v4
451 	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer on v4
453 	mcr	p15, 0, r0, c8, c7		@ invalidate I,D TLBs on v4