Lines Matching refs:invalidate
93 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
96 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
124 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
148 2: mcr p15, 0, r3, c7, c14, 2 @ clean+invalidate D index
154 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
174 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
176 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
210 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
229 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
234 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
257 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
293 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
355 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
363 2: mcr p15, 0, r3, c7, c14, 2 @ clean & invalidate D index
369 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
372 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
394 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
397 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4