Lines Matching refs:r0
80 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
81 bic r0, r0, #0x1000 @ ...i............
82 bic r0, r0, #0x000e @ ............wca.
83 mcr p15, 0, r0, c1, c0, 0 @ disable caches
108 ret r0
117 mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
131 mov r0, #0
132 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
183 sub r3, r1, r0 @ calculate total size
188 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
189 add r0, r0, #CACHE_DLINESIZE
190 cmp r0, r1
224 bic r0, r0, #CACHE_DLINESIZE - 1
227 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
230 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
232 add r0, r0, #CACHE_DLINESIZE
233 cmp r0, r1
236 mov r0, #0
251 add r1, r0, r1
252 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
253 add r0, r0, #CACHE_DLINESIZE
254 cmp r0, r1
276 tst r0, #CACHE_DLINESIZE - 1
277 bic r0, r0, #CACHE_DLINESIZE - 1
278 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
281 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
282 add r0, r0, #CACHE_DLINESIZE
283 cmp r0, r1
302 bic r0, r0, #CACHE_DLINESIZE - 1
303 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
304 add r0, r0, #CACHE_DLINESIZE
305 cmp r0, r1
322 bic r0, r0, #CACHE_DLINESIZE - 1
323 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
324 add r0, r0, #CACHE_DLINESIZE
325 cmp r0, r1
338 add r1, r1, r0
365 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
366 add r0, r0, #CACHE_DLINESIZE
405 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
419 mov r0, r0
421 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
428 mov r0, #0
429 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
430 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
432 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
436 mrc p15, 0, r0, c1, c0 @ get control register v4
437 bic r0, r0, r5
438 orr r0, r0, r6
440 orr r0, r0, #0x4000 @ .R.. .... .... ....