Lines Matching refs:r2
40 and r2, r1, r0, lsr #13
45 add r2, r2, #1 @ NumSets
52 1: sub r2, r2, #1 @ NumSets--
56 mov r6, r2, lsl r0
60 cmp r2, #0
98 ALT_SMP(mrc p15, 0, r2, c0, c0, 0) @ read main ID register
102 teq r1, r2, lsr #4 @ test for errata affected core and if so...
127 add r2, r10, r10, lsr #1 @ work out 3x current cache level
128 mov r1, r0, lsr r2 @ extract cache type bits from clidr
141 and r2, r1, #7 @ extract the length of the cache lines
142 add r2, r2, #4 @ add 4 (line length offset)
154 ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11
155 THUMB( lsl r6, r9, r2 )
273 dcache_line_size r2, r3
274 sub r3, r2, #1
282 add r12, r12, r2
286 icache_line_size r2, r3
287 sub r3, r2, #1
291 add r12, r12, r2
325 dcache_line_size r2, r3
327 sub r3, r2, #1
335 add r0, r0, r2
353 dcache_line_size r2, r3
354 sub r3, r2, #1
368 add r0, r0, r2
381 dcache_line_size r2, r3
382 sub r3, r2, #1
390 add r0, r0, r2
403 dcache_line_size r2, r3
404 sub r3, r2, #1
412 add r0, r0, r2
427 teq r2, #DMA_FROM_DEVICE
440 teq r2, #DMA_TO_DEVICE