Lines Matching refs:pr_err
400 pr_err("L%d: not compatible with uniphier cache\n", in __uniphier_cache_init()
406 pr_err("L%d: cache-level is not specified\n", *cache_level); in __uniphier_cache_init()
411 pr_err("L%d: cache-level is unexpected value %d\n", in __uniphier_cache_init()
417 pr_err("L%d: cache-unified is not specified\n", *cache_level); in __uniphier_cache_init()
427 pr_err("L%d: cache-line-size is unspecified or invalid\n", in __uniphier_cache_init()
435 pr_err("L%d: cache-sets is unspecified or invalid\n", in __uniphier_cache_init()
443 pr_err("L%d: cache-size is unspecified or invalid\n", in __uniphier_cache_init()
454 pr_err("L%d: failed to map control register\n", *cache_level); in __uniphier_cache_init()
461 pr_err("L%d: failed to map revision register\n", *cache_level); in __uniphier_cache_init()
468 pr_err("L%d: failed to map operation register\n", *cache_level); in __uniphier_cache_init()
535 pr_err("failed to initialize L2 cache\n"); in uniphier_cache_init()