Lines Matching refs:r9
63 and r9, r8, r7, lsl #1
64 add r6, r6, r9, lsr #1
65 and r9, r8, r7, lsl #2
66 add r6, r6, r9, lsr #2
67 and r9, r8, r7, lsl #3
68 add r6, r6, r9, lsr #3
72 and r9, r8, #15 << 16 @ Extract 'n' from instruction
73 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
77 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
84 and r9, r8, #0x00f @ get Rm / low nibble of immediate value
87 orrne r6, r9, r6, lsr #4 @ combine nibbles } else
88 ldreq r6, [r2, r9, lsl #2] @ { load Rm value }
90 and r9, r8, #15 << 16 @ Extract 'n' from instruction
91 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
95 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
104 and r9, r8, #15 << 16 @ Extract 'n' from instruction
105 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
109 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
118 mov r9, r8, lsr #7 @ get shift count
119 ands r9, r9, #31
125 mov r6, r6, lsl r9 @ 0: LSL #!0
133 mov r6, r6, lsr r9 @ 4: LSR #!0
141 mov r6, r6, asr r9 @ 8: ASR #!0
149 mov r6, r6, ror r9 @ C: ROR #!0
194 and r9, r8, #0xaa
195 add r6, r6, r9, lsr #1
196 and r9, r6, #0xcc
198 add r6, r6, r9, lsr #2
211 and r9, r8, #0xaa
212 add r6, r6, r9, lsr #1
213 and r9, r6, #0xcc
215 add r6, r6, r9, lsr #2
217 and r9, r8, #7 << 8
218 ldr r7, [r2, r9, lsr #6]
221 str r7, [r2, r9, lsr #6]