Lines Matching refs:r7
32 and r7, r8, #15 << 24
33 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine
60 mov r7, #0x11
61 orr r7, r7, #0x1100
62 and r6, r8, r7
63 and r9, r8, r7, lsl #1
65 and r9, r8, r7, lsl #2
67 and r9, r8, r7, lsl #3
73 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
75 subne r7, r7, r6, lsl #2 @ Undo increment
76 addeq r7, r7, r6, lsl #2 @ Undo decrement
77 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
91 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
93 subne r7, r7, r6 @ Undo incrmenet
94 addeq r7, r7, r6 @ Undo decrement
95 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
105 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
107 subne r7, r7, r6, lsr #20 @ Undo increment
108 addeq r7, r7, r6, lsr #20 @ Undo decrement
109 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
116 and r7, r8, #15 @ Extract 'm' from instruction
117 ldr r6, [r2, r7, lsl #2] @ Get register 'Rm'
120 and r7, r8, #0x70 @ get shift type
121 orreq r7, r7, #8 @ shift count = 0
122 add pc, pc, r7
162 and r7, r8, #15 << 12
163 add pc, pc, r7, lsr #10 @ lookup in table
199 movs r7, r8, lsr #9 @ C = r8 bit 8 (R bit)
202 ldr r7, [r2, #13 << 2]
204 addeq r7, r7, r6, lsl #2 @ increment SP if PUSH
205 subne r7, r7, r6, lsl #2 @ decrement SP if POP
206 str r7, [r2, #13 << 2]
218 ldr r7, [r2, r9, lsr #6]
220 sub r7, r7, r6, lsl #2 @ always decrement
221 str r7, [r2, r9, lsr #6]