Lines Matching refs:tmp1
92 .macro check_cpu_part_num part_num, tmp1, tmp2
93 mrc p15, 0, \tmp1, c0, c0, 0
94 ubfx \tmp1, \tmp1, #4, #12
96 cmp \tmp1, \tmp2
100 .macro exit_smp, tmp1, tmp2
101 mrc p15, 0, \tmp1, c1, c0, 1 @ ACTLR
102 bic \tmp1, \tmp1, #(1<<6) | (1<<0) @ clear ACTLR.SMP | ACTLR.FW
103 mcr p15, 0, \tmp1, c1, c0, 1 @ ACTLR
106 check_cpu_part_num 0xc09, \tmp1, \tmp2
107 mrceq p15, 0, \tmp1, c0, c0, 5
108 andeq \tmp1, \tmp1, #0xF
109 moveq \tmp1, \tmp1, lsl #2
111 moveq \tmp2, \tmp2, lsl \tmp1
112 ldreq \tmp1, =(TEGRA_ARM_PERIF_VIRT + 0xC)
113 streq \tmp2, [\tmp1] @ invalidate SCU tags for CPU
120 .macro tegra_get_soc_id base, tmp1
121 mov32 \tmp1, \base
122 ldr \tmp1, [\tmp1, #APB_MISC_GP_HIDREV]
123 and \tmp1, \tmp1, #0xff00
124 mov \tmp1, \tmp1, lsr #8